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Semiconductor device

A semiconductor and active area technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve problems such as electrical faults, CMOS circuits that cannot be applied, and electronic device function failures

Inactive Publication Date: 2019-03-05
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Latch-up is the phenomenon of parasitic SCR paths triggered by internal or external noise in CMOS circuits, which will lead to functional failure or electrical failure of electronic devices
At the same time, single event lockup caused by particle impact or electromagnetic radiation will make CMOS circuits unable to be used in aerospace, outer space, servers and automobiles, etc.

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

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Embodiment Construction

[0011] The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are examples only and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the ensuing description may include embodiments where the first and second features are formed in direct contact, and may also include that additional features may be formed An embodiment between the first and second features such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat element symbols and / or letters in each example. Repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or structures discussed.

[0012] In addition, spatially relative ter...

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Abstract

A semiconductor device includes a first active area of a first type, a second active area of a second type, and a plurality of gates. The gates are arranged above and across the first active area andthe second active area. At a first side of a first gate of the plurality of gates, a first region of the first active area is configured to receive a first voltage and a first region of the second active area is configured to receive a second voltage. At a second side of the first gate, a second region of the first active area is disconnected from the first voltage and a second region of the second active area is disconnected from the second voltage.

Description

technical field [0001] The disclosure relates to an electronic device and its manufacturing method, in particular to a semiconductor device and its manufacturing method. Background technique [0002] Latch-up is a phenomenon of parasitic SCR paths triggered by internal or external noise in CMOS circuits, which will lead to functional failure or electrical failure of electronic devices. At the same time, single event lock-up caused by particle impact or electromagnetic radiation will prevent CMOS circuits from being used in aerospace, outer space, servers, and automobiles. Contents of the invention [0003] A semiconductor device includes a first type of first active region, a second type of second active region and a plurality of gates. The gate is disposed on the first active area and the second active area and straddles the first active area and the second active area. At a first side of a first gate of the plurality of gates, a first region of the first active region ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/092H01L21/8238
CPCH01L21/8238H01L27/092H01L29/87H01L29/0649H01L27/0921H01L27/0262H01L21/823871H01L29/1083
Inventor 张伊锋彭柏霖李介文
Owner TAIWAN SEMICON MFG CO LTD