A self-organized deep neural network acceleration chip computing device

Abstract

The invention belongs to the technical field of integrated circuits, in particular to a computing device of a channel self-organized deep neural network acceleration chip. The device of the present invention includes: a plurality of on-chip memory modules for storing eigenvalue matrices by channel; a multi-row multi-column computing unit array for performing operations such as convolution and matrix multiplication in parallel; a central control unit for controlling Computational process and data flow, and data interaction with the outside world. Computations from the same input channel are processed in parallel by the same column of compute units in the compute unit array, and computations from the same output channel are processed in parallel by the same row. In the computing process, the device organizes the data flow according to the corresponding relationship between the channel and the memory, avoids the cross access of the computing unit among multiple memories, reduces the number of data transfers between the memories, and improves the energy efficiency of the chip.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a computing device for a deep neural network acceleration chip. Background technique [0002] Today, deep neural network algorithms are widely used in many fields such as autonomous driving, target recognition and detection, and machine translation. As the application of deep learning algorithms becomes increasingly complex, traditional CPUs and GPUs become more and more stretched in terms of energy efficiency, and a series of dedicated acceleration chips for deep neural network algorithms have emerged as the times require. [0003] The deep neural network algorithm consists of many layers, and the input eigenvalues ​​and output eigenvalues ​​of each layer are matrix groups composed of multiple channels. After the input eigenvalues ​​undergo a series of linear operations (such as convolution, matrix multiplication), and then pass through a non-linear acti...

AI Technical Summary

Problems solved by technology

However, since the eigenvalues ​​of multiple input channels often need to be superimposed across channels before the final output eigenvalues ​​are obtained, this limitation leads to the need to exchange data between multiple on-chip memories, thus affecting the final energy efficiency.

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