A method for forming a fin field effect semiconductor

Abstract

A method for forming a semiconductor structure, comprising: forming a semiconductor base, the semiconductor base includes a substrate, fins protruding from the substrate, the substrate includes a first region and a second region, and fins protrude from the substrate The fin portion of the substrate in the first region is a first fin portion, and the fin portion protruding from the substrate in the second region is a second fin portion; the second fin portion includes a sacrificial layer, and covers the sacrificial layer the semiconductor layer; firstly, a first dummy gate oxide layer is formed by in-situ steam generation and decoupling plasma nitrogen treatment; then, a second dummy gate oxide layer is formed on the surface of the second fin. The method for forming the semiconductor structure of the present invention avoids that when the fins containing the sacrificial layer are oxidized by the in-situ steam generation (ISSG) and the decoupling plasma nitrogen treatment (DPN) process, the substance in the sacrificial layer penetrates and migrates into the semiconductor layer so that its Performance deteriorates.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming a fin field effect semiconductor. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to adapt to the reduction of feature size, the channel length of MOSFET field effect transistors is also continuously shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur. [0003] Therefore, in order to better adapt to the reduction of feature size, the semi...

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Problems solved by technology

[0004] Among them, FinFET devices usually include a core device (Core) and an input-output device (IO). During the device manufacturing process, the core device and the input-output device need to form different structures. The performance of the input-output device (IO), usually adopts steam in-situ generation (ISSG) and decoupling plasma nitrogen treatment (DPN) process to process the fins of the input-output device and the core device at the same time to form a dummy gate oxide layer, this high temperature Thermal oxygen treatment can easily lead to the permeation and migration of substances in the sacrificial layer in the fin of the core device to the semiconductor layer, thereby affecting the performance of the FinFET

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