A General Electronic Countermeasure Equipment Control Architecture

Abstract

The present invention proposes a general electronic countermeasure equipment control framework. Including DSP control board and several FPGA processing boards; FPGA processing chip is equipped with several functional sub-modules and co-processing CPU, EMIF bus transceiver module, RapidIO bus transceiver module; DSP processing chip and FPGA processing chip are completed by RapidIO bus and EMIF bus Information interaction; FPGA processing chip internal interconnection bus consists of three main controllers as command initiators, namely RapidIO bus, EMIF bus, and co-processing CPU; the FPGA processing board includes several FPGA processing chips and a RapidIO switch; Each FPGA processing chip is connected to the RapidIO switch inside the FPGA processing board; the RapidIO switch inside each FPGA processing board is connected to the RapidIO switch in the DSP control board through an optical fiber or a backplane. The invention improves the universality and expansibility of the electronic countermeasure control system, and reduces the control information delay.

Description

technical field [0001] The invention belongs to the technical field of software radio, and in particular relates to a general electronic countermeasure equipment control framework. Background technique [0002] In recent years, the fields of communication, radar and electronic countermeasures have developed rapidly. The demand for general low-latency and large-bandwidth data control and exchange is gradually increasing, especially for electronic countermeasure equipment with strict data processing delay and bandwidth requirements, which often need to collect and process a large amount of high-precision data in a short period of time, which requires Complete the control, exchange and processing of UWB data in real time. With the rapid development of processing chips in characteristics such as operating speed and transmission bandwidth. The control architecture based on the combination of FPGA and DSP is a solution that can fully meet the current needs. However, the interco...

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Problems solved by technology

However, the current interconnection structure between FPGA and DSP is single, and the versatility is poor.

It is difficult for DSP to directly control the internal sub-modules of FPGA to complete real-time data control and interaction, all of which require dedicated modules in FPGA to complete bridging, resulting in extended data control and processing time, and information in each module cannot be effectively interacted. poor scalability

Different devices require their own dedicated control processing architecture, which increases the time cost and technical risk of research and development for the device

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