Graph matching method and matching system thereof

Abstract

The invention discloses a graph matching method and a matching system thereof, and the method comprises the steps of carrying out the region division processing of a matching layout, enabling the matching layout to be divided into a plurality of sub-regions, and enabling each sub-region to comprise a plurality of comparison regions; matching processing is carried out, a matching area is obtained on the to-be-matched layout, and the matching area is matched with all comparison areas on the matching layout; obtaining an equivalent area in the to-be-matched layout according to the matching area,wherein the equivalence area comprises the matching area, the edge of the equivalence area is identical to the edge of the matching layout, the position of the matching area in the equivalence area isa first position, the position of the comparison area in the matching layout is a second position, and the first position is the same as the second position. The zoning processing is used for dividing the matching layout into a plurality of sub-regions, and the complexity of graph matching can be simplified by performing matching processing on the comparison region in each sub-region, so that thecalculation time is saved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a pattern matching method and a matching system thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density and higher integration. With the improvement of component density and integration of semiconductor devices, the size of transistors is getting smaller and smaller, and more and more transistors are integrated on a chip. [0003] As the number of transistors integrated on a chip increases, the manufacturing process of the chip becomes more and more complicated. Especially in photolithography technology, in order to reduce the distortion of photolithography patterns caused by light diffraction and interference, the industry introduces the Optical Proximity Correction (OPC) method to correct the mask pattern. Due to the longer optical pro...

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Problems solved by technology

[0004] However, due to the huge amount of graphic information in the chip layout in the rule base and the new chip graphics, the time for graphic matching is too long, resulting in a high manufacturing cost of the mask plate.

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