Unlock instant, AI-driven research and patent intelligence for your innovation.

A multi-epitaxial superjunction device fabrication method

A technology of super junction devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high production cost, large terminal area, etc., and achieve the effect of increasing reverse recovery softness

Active Publication Date: 2021-08-03
WUXI TONGFANG MICROELECTRONICS
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, a common method for preparing a superjunction structure is multiple epitaxy plus photolithography plus implantation technology, that is, first do an N-type epitaxy on the N+ type substrate material, and then photoetch the P-type column area and perform P-type ionization. Implantation, followed by the second N-type epitaxy, photoetching the P-type column area again and performing P-type ion implantation, and repeating the above process for the third, fourth or even more times according to the breakdown voltage requirements of the device. However, this The area occupied by the terminal area of ​​the structure is relatively large, and the production cost of multiple epitaxy, multiple lithography and multiple implants is relatively high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A multi-epitaxial superjunction device fabrication method
  • A multi-epitaxial superjunction device fabrication method
  • A multi-epitaxial superjunction device fabrication method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] Embodiment 1: Taking an N-type planar gate super-junction MOSFET device as an example, the first conductivity type is N-type, the second conductivity type is P-type, a method for manufacturing a super-junction device with multiple epitaxy, on a top view plane , the semiconductor device includes an active region and a terminal region surrounding the active region;

[0039] The active region includes several superjunction device units connected in parallel, and the manufacturing method of the superjunction device unit includes the following steps:

[0040] Such as figure 1 As shown, the first step: select an N-type silicon substrate as the N-type substrate 2, and grow a first N-type epitaxial layer 31 on the upper surface of the N-type substrate 2 by using an epitaxial process;

[0041] Such as figure 2 As shown, the second step: generally implant P-type impurities on the surface of the first N-type epitaxial layer 31 to form an undiffused P-type layer 12, and then sel...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the technical field of manufacturing semiconductor devices, and relates to a multi-epitaxial superjunction device manufacturing method. By growing multiple epitaxial layers on a substrate, each epitaxial layer is generally injected with impurities of the second conductivity type and selectively Impurities of the first conductivity type are implanted, and then high-temperature push wells are formed to form a multi-epitaxial super junction structure; the present invention replaces the existing deposition by deposition epitaxy + P-type ion general injection + selective implantation of N-type ions + high-temperature push wells Epitaxy + general injection of N-type ions + selective implantation of P-type ions + high-temperature push well, so that the distance between the formed P-type columns increases (that is, the width of the N-type columns increases), so that the N-type epitaxial layer is forward-conducting The concentration of majority carriers that can be stored is larger, the reverse recovery time is longer, the reverse recovery softness is increased, and the dynamic parameter characteristics of di / dt and dv / dt are improved.

Description

technical field [0001] The invention relates to a method for manufacturing a super junction device, in particular to a method for manufacturing a super junction device with multiple epitaxy, and belongs to the technical field of manufacturing semiconductor devices. Background technique [0002] The on-resistance of traditional power MOSFET devices is mainly determined by the length and doping concentration of the drift region. The smaller the length of the drift region, the smaller the on-resistance, and the higher the doping concentration of the drift region, the smaller the on-resistance. However, changes in these two aspects will lead to a decrease in the breakdown voltage of the device, so the on-resistance and the breakdown voltage are in a contradictory relationship or a compromise relationship, that is, the reduction of the on-resistance is limited by the breakdown voltage. [0003] The emergence of superjunction structures breaks this limitation. The super junction ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L21/336
CPCH01L29/0634H01L29/66712H01L29/7802
Inventor 薛璐许高潮张海涛
Owner WUXI TONGFANG MICROELECTRONICS