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Semiconductor device, manufacturing method and electronic device

A manufacturing method and technology of electronic equipment, applied in the fields of semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as affecting user experience, large parasitic capacitance, misjudgment, etc., to increase the cost of photomasks and reduce parasitic capacitances , the effect of improving device performance

Active Publication Date: 2020-12-15
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Moreover, these capacitive sensors need to determine the user's touch operation or fingerprint information by sensing the capacitance change of its sensing area. However, due to its surface passivation, silicon dioxide layer, silicon nitride layer, polyimide The amine layer is stacked in three layers, which leads to a large internal parasitic capacitance, which in turn causes the sensing signal in the sensing area to be easily affected by the internal parasitic capacitance during transmission and become less stable. The performance of the capacitive sensor is reduced, making the sensing result of the capacitive sensor inaccurate or even misjudgmental, which affects the user experience

Method used

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  • Semiconductor device, manufacturing method and electronic device
  • Semiconductor device, manufacturing method and electronic device
  • Semiconductor device, manufacturing method and electronic device

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Embodiment Construction

[0044] As mentioned in the background art, the surface passivation of some capacitive sensors is often realized by stacking a silicon dioxide layer, a silicon nitride layer and a polyimide layer in sequence. For details, please refer to figure 1, the capacitive sensor includes: a semiconductor substrate 100 with a sensing region I and a logic region II, a sensing electrode (which may be a pixel electrode), metal wiring (M1-M3, TM), a silicon dioxide layer 101, a nitrogen SiO layer 102 and polyimide layer (polyimide) 103 . Wherein, a silicon dioxide layer 101, a silicon nitride layer 102, and a polymer layer (polyimide) 103 are stacked sequentially above the metal wiring TM to form a surface passivation structure, which can isolate the device from the surrounding environment and prevent Foreign matter contaminates the device surface of the capacitive sensor, such as harmful impurity ions Na+, water vapor, dust, etc., controls and stabilizes the electrical characteristics of the...

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Abstract

The invention provides a semiconductor device, a manufacturing method and electronic equipment, which reduce the thickness of an inorganic passivation layer above a first region and increase the thickness of an organic passivation layer above the first region, thereby reducing parasitic capacitance and improving device performance.

Description

technical field [0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular, to a semiconductor device, a manufacturing method and an electronic device. Background technique [0002] In an integrated circuit, many components need to be assembled on the same semiconductor substrate, and these components need to be connected to each other by wiring, and with the improvement of integration and the reduction of feature size, the wiring density must increase, so it is used for components. Surface passivation techniques for integrated circuits with electrical isolation between devices and wiring are very important. The surface passivation technology of integrated circuits can isolate components from the surrounding atmosphere, enhance the blocking ability of components to foreign ion contamination, control and stabilize the characteristics of the surface of integrated circuits, and protect circuits and internal wiring from mec...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/762
Inventor 陈福刚茹捷
Owner SEMICON MFG INT (SHANGHAI) CORP