Supercharge Your Innovation With Domain-Expert AI Agents!

Adder carry output calculation circuit

A technology of carry output and calculation circuit, which is applied in the field of calculation, can solve the problem of large carry delay, etc., and achieve the effect of reducing time delay, reducing the number of calculations, and optimizing calculation speed

Active Publication Date: 2021-07-09
CANAAN CREATIVE (SH) CO LTD
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Usually, the serial carry adder requires a stage-by-stage carry, and the carry delay is very large

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Adder carry output calculation circuit
  • Adder carry output calculation circuit
  • Adder carry output calculation circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0043] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0044] The related technical terms that may be involved in the present invention are briefly introduced here.

[0045] The full adder (Full Adder) is a combined circuit that uses a gate circuit to add two binary numbers and obtain the sum. It is called a full adder. A full adder can handle the low-order carry and output the carry of the addition of this bit. A multi-bit full adder can be obtained by cascading multiple one-bit full adders.

[0046] Carry Look Ahead Adder (Carry Look Ahead Adder) is a parallel adder designed by improving the ordinary full adder. It is mainly improved for the delay caused by mutual carry when ordinary full adders are connected in series.

[0047] The arithmetic logic unit (Arithmetic&logic...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention proposes an adder carry output calculation circuit, comprising: a first-level calculation device, which includes a domino logic connection module, for performing a first-level calculation; and a second-level calculation device, which is compatible with the first-level calculation means connected to receive the output of said first level calculation means and to perform second level calculations. The carry output calculation circuit of the adder of the present invention can greatly reduce the time delay in the operation of the adder, improve the operation speed and optimize the performance.

Description

technical field [0001] The invention belongs to the technical field of computing, in particular to an adder carry output computing circuit. Background technique [0002] At present, according to different calculation principles and structures, adders can be divided into the following types: serial carry adders with simple algorithms, high-performance carry-look-ahead adders, carry-select adders, parallel prefix adders, etc.; Performance adders, according to the different carry chains, can be divided into the following types: Kogge-Stone adder, Brent-Kung adder, Han-Carlson adder, Sklansky adder, etc. [0003] The theoretically fastest tree structure among the existing high-performance adders is the Kogge-Stone tree. For the N-bit addition operation, the logical series required to generate the highest carry is log2(N), and the logical series of the carry is limited by Restricted to the basic modules of the standard library. [0004] Usually, the serial carry adder requires ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/504
Inventor 陈双文张楠赓吴敬杰刘杰尧
Owner CANAAN CREATIVE (SH) CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com