Multi-stage thermoelectric refrigerator structure and manufacturing method thereof
A thermoelectric cooler and thermoelectric technology, which is applied in the manufacture/processing of thermoelectric device parts, thermoelectric devices, and thermoelectric devices that only use the Peltier or Seebeck effect. problems such as low degree of precision, to achieve the effect of simple preparation process, reduced process cost, and high graphics accuracy
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Embodiment 1
[0057] Embodiment 1 of the present invention provides a multi-stage thermoelectric refrigerator using bismuth telluride material and its preparation method, such as Figure 7 shown, including the following steps:
[0058] Step 1: Select an alumina ceramic substrate, adopt laser drilling, sputtering coating, exposure and development, electroplating and etching, etc., to prepare upper and lower ceramic substrates 711, 713 containing metal pattern circuit layers, and metal pattern circuit layers and Vertical metal vias 74 in the middle ceramic substrate 712 . Among them, the metal graphic circuit layer 73 is designed according to the interconnection requirements of the thermoelectric particles 72; the thickness of the metal graphic circuit layer is 60 μm, the deposition method is electroplating copper, the processing accuracy is 50 μm, and the diameter of the vertical through hole is 100 μm. The number of vertical through holes can be Changes according to design requirements;
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Embodiment 2
[0067] Embodiment 2 of the present invention provides another bismuth telluride material multi-stage thermoelectric refrigerator preparation method, such as Figure 7 shown, including the following steps:
[0068] Step 1: Select an alumina ceramic substrate, adopt laser drilling, sputtering coating, exposure and development, electroplating and etching, etc., to prepare upper and lower ceramic substrates 711, 713 containing metal pattern circuit layers, and metal pattern circuit layers and Vertical metal vias 74 in the middle ceramic substrate 712 . Among them, the metal graphic circuit layer 73 is designed according to the interconnection requirements of the thermoelectric particles 72; the thickness of the metal graphic circuit layer is 30 μm, the deposition method is electroplating copper, the processing accuracy is 30 μm, and the diameter of the vertical through hole is 50 μm; the number of vertical through holes can be Changes according to design requirements;
[0069] S...
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