On-chip debugging device and method

Abstract

The invention discloses an on-chip debugging device and method, and the device comprises an external interface module which is used for outputting the debugging state information of a chip to an external debugger, and receiving a control instruction of the external debugger; a debugging mode control module which is used for setting a to-be-sampled type of an internal signal of a specified chip according to the debugging configuration of the external debugger or the internal CPU, and setting a debugging trigger condition; a debugging monitoring module which is used for sampling and recording the internal signals of the chip of the specified type so as to identify the operation state of the chip; and a debugging information processing module which is used for storing the running state of thechip into an internal debugging memory, and sending the running state of the chip to the external debugger through the external interface module or sending the running state of the chip to an internal CPU through an internal bus. By means of the device and the method, the chip on-chip debugging function which is relatively simpler, occupies fewer resources and has more powerful functions can be achieved.

Description

technical field [0001] The invention relates to chip debugging technology, in particular to an on-chip debugging device and method. Background technique [0002] With the continuous improvement of technology, the design of integrated circuit chips is becoming more and more complicated. The area of ​​each chip is constantly increasing, and more and more logics are integrated in it, and the functions are becoming more and more complex, thus putting forward higher requirements for chip verification. The pre-verification of the chip in the design process, including simulation verification and prototype verification, has been difficult to fully guarantee the correctness of the chip. In addition, the chip has various configurations and working modes during use, and a little carelessness may cause problems. unpredictable consequences. Therefore, debugging on real chips becomes more and more important. The efficiency of on-chip debugging also greatly affects the stability of the ...

AI Technical Summary

Problems solved by technology

For on-chip debugging of dedicated chips, the above techniques are more difficult to implement, and there is currently no external debugger available to parse the input / output information of the JTAG interface

[0008] (2) Existing debugging method 2

Although the technical solution in Patent Document 3 includes a trigger control function, it can only start tracking data after the trigger condition is met. Generally, when an error occurs during operation of a chip and needs to be debugged, the trigger conditions that can be set are all It is the moment after the error occurs, so the traced data in this case can only be the data after the error occurs, and the data really needed for debugging should be the data before the error occurs

Especially when an error occurs during the long-term operation of the chip, it is difficult to analyze the cause of the error if the debugging method of Patent Document 3 is used

The technical solution in Patent Document 3 also provides the function of outputting tracking data externally, but because the tracked data in this technical solution is unconditionally tracked after the trigger condition is met, there is no special distinction between the information that is effective for debugging and the sampled data The amount is large, and the performance requirements of the output interface are high, which is not conducive to the specific hardware design of this technology

[0012] (3) Existing debugging method three

When an error occurs in the normal operation of the chip, online design is needed. This solution is powerless and does not play any role in auxiliary debugging.

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