High-power MOS chip and control chip combined packaging structure and packaging method
A technology for controlling chips and packaging methods, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems of insufficient heat dissipation of MOS chips, poor electrical performance of metal wires, etc., and reduce layout space , reduced package size, and excellent electrical performance
Pending Publication Date: 2019-08-23
WUXI ZHONGWEI GAOKE ELECTRONICS +1
View PDF0 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0009] 1) When the MOS chip gate needs high power output, the electrical performance of the welded metal wire is not good;
[0010] 2) When the MOS chip needs heat dissipation, the substrate or metal frame cannot meet the heat dissipation requirements of the MOS chip
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0046] The present invention will be further described below in conjunction with specific drawings and embodiments.
[0047] A combined packaging method for a high-power MOS chip and a control chip, comprising the following steps;
[0048] Step S1, such as figure 2 As shown, a metal frame 1 is provided, and the metal frame 1 is provided with a concave portion 101; a through hole 2 and a guide groove 3 are provided in the metal frame concave portion 101;
[0049] The metal frame 1 is prefabricated with circuits, which is convenient for connecting the MOS chip and the control chip;
[0050] The through hole 2 and the guide groove 3 facilitate subsequent filling of the molding compound;
[0051] Step S2, such as image 3 As shown, the MOS chip 4 is welded in the concave portion 101 on the back of the metal frame 1 through a flip-chip welding process; the MOS chip 4 is connected to the corresponding pad on the metal frame 1 through the protrusion 5;
[0052] The protrusion 5 ...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention provides a high-power MOS chip and control chip combined packaging structure comprising a metal frame, a MOS chip, a metal heat radiating fin, a control chip, a metal wire and a plasticpackaging material. The metal frame is provided with a recess. A line is pre-fabricated on the metal frame to facilitate connection of the MOS chip and the control chip. A MOS chip is flip-chip-weldedin the recess on the back surface of the metal frame. The MOS chip is connected with the corresponding pad on the metal frame through a convex part. The metal heat radiating fin is mounted on the back of the MOS chip. The metal heat radiating fin is connected with the drain electrode on the back surface of the MOS chip. The control chip is mounted on the front protruding part corresponding to therecess of the metal frame. The control chip is connected with the corresponding pad on the metal frame through the metal wire. The plastic packaging material is arranged on the front surface of the metal frame, the recess of the back surface of the metal frame and the periphery of the metal wire. The MOS chip has better electrical performance and better heat radiation effect in case of high-poweroutput.
Description
technical field [0001] The invention belongs to the technical field of integrated circuit packaging, in particular to a combined packaging structure and packaging method of a high-power MOS chip and a control chip. Background technique [0002] The existing combined stacking structure of MOS chips and control chips requires the help of adhesive film stacking structures, see figure 1 ; [0003] 1. First mount the MOS chip on the substrate or frame; [0004] 2. Then solder the metal wire to the MOS chip; [0005] 3. Install the scratched control chip with adhesive film, and the adhesive film covers the metal wires connected to the MOS chip; [0006] 4. Weld the metal wire to the control chip; [0007] 5. Finally, it is encapsulated by plastic molding compound to protect the product structure. [0008] Among the existing technologies that can realize the stacking of MOS chips and control chips, there are the following disadvantages: [0009] 1) When the MOS chip gate need...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/48H01L21/60H01L23/495H01L23/367
CPCH01L23/49548H01L23/49568H01L21/4882H01L21/4825H01L24/81H01L23/3672H01L2224/812H01L2224/16245H01L2224/73265H01L2224/48091H01L2924/181H01L2924/19107H01L2924/00014H01L2924/00012
Inventor 殷炯
Owner WUXI ZHONGWEI GAOKE ELECTRONICS