Semiconductor device and method of manufacturing same
A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as difficulty in completely removing air bubbles, deterioration of device operating life, etc.
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no. 1 example
[0035] Figure 1A is a view schematically illustrating the front surface of the semiconductor chip 1 of the semiconductor device 2 according to the first embodiment, and Figure 1B is showing Figure 1A A view of the rear surface of the semiconductor chip 1 shown in FIG. Figure 1C is a view illustrating a cross section of the semiconductor device 2 according to the first embodiment, and illustrates when mounted on the mounting substrate 100 Figure 1A and Figure 1B The cross-section of the semiconductor chip 2 shown in FIG. Such as Figure 1A to Figure 1C As shown, the semiconductor device 2 includes a semiconductor chip 1 , a seed metal layer 50 , a rear surface metal layer 60 , a metal layer 70 , an AuSn solder layer 90 , and a mounting substrate 100 . The semiconductor chip 1 has a silicon carbide (SiC) substrate 10 and a gallium arsenide epitaxial layer 20 . In the following description, the MMIC is exemplified as the semiconductor chip 1, but the semiconductor chip 1...
no. 2 example
[0067] In the present disclosure, when the rear surface metal layer 60 is fixed to the mounting substrate 100 by using the AuSn solder layer 90, the pattern of the metal layer 70 having poor wettability with the AuSn solder layer 90 collects the bubbles, and the bubbles are discharged to the outside of the semiconductor chip 1 . According to this, the pattern of the metal layer 70 may be exposed from the rear surface metal layer 60 when viewed from the rear surface of the semiconductor chip 1 . In the first embodiment, the seed metal layer 50 and the rear surface metal layer 60 are sequentially formed on the rear surface of the substrate 10 , and the metal layer 70 is patterned on the rear surface metal layer 60 so that the metal layer 70 is exposed.
[0068] In the second embodiment, the material of the seed metal layer 50 of the semiconductor device 2a is set to a material composed of any one of NiCr, Ni, and Ti having poor wettability with the AuSn solder layer 90, and the ...
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Abstract
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