Low-EMI deep trench isolation planar power semiconductor device and preparation method thereof
A power semiconductor and deep trench isolation technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of reducing device current density, increasing device cost, EMI interference, etc., to achieve Improve chip current density, reduce chip cost, and reduce the effect of terminal area
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[0074] The present invention will be further described below in conjunction with specific drawings and embodiments.
[0075] In order to effectively reduce EMI interference, reduce chip area, reduce cost, and increase current density, taking N-type power semiconductor devices as an example, the present invention includes a semiconductor substrate 16 having an N conductivity type, in the center of the semiconductor substrate 16. The area is provided with a cell area and a terminal area located in the outer circle of the cell area; the cells in the cell area adopt a planar structure, and the cells in the cell area are connected in parallel on the front surface of the semiconductor substrate. The substrate source metal 30 is provided with a back electrode structure on the back of the semiconductor substrate 16;
[0076] On the cross section of the power semiconductor device, a P-type base region 26 of the substrate penetrating the terminal region is provided in the upper part of the t...
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