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Technology used to inspect semiconductor wafers

A technology of semiconductors and wafers, applied in the field of inspection of semiconductor wafers

Active Publication Date: 2021-02-23
APPL MATERIALS ISRAEL LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The technique uses a detector located at a specific position relative to the pattern, where part of the responding electrons are not received by the detector due to occlusion by some parts of the pattern, such as side walls, thus creating a shadow

Method used

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  • Technology used to inspect semiconductor wafers
  • Technology used to inspect semiconductor wafers
  • Technology used to inspect semiconductor wafers

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Embodiment Construction

[0019] Aspects of the present case relate to inspection of semiconductor wafers, and in particular, to determining the height of certain patterns on a semiconductor wafer. A "pattern" is to be understood as one or more features formed on a semiconductor wafer. For the purposes of this case, the pattern typically has a height or depth, sometimes referred to as a "valley", that distinguishes the pattern from the planar base of the wafer. The pattern has sidewalls or edges. The pattern, due to the height of the pattern relative to the valley, creates a "shadow".

[0020] Generally, an electron beam is irradiated on an observation area of ​​a sample surface, and an image (for example, a scanning electron microscope (SEM) image) is acquired based on detection signals of secondary electrons from a detector disposed obliquely above the observation area. The length of the shadow of the pattern appearing in the image is detected. Then, based on the detection length of the shadow and...

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Abstract

The height of the pattern on the semiconductor wafer is determined by comparing a measured image of the pattern with a predicted image of the pattern generated by a shadow model. The estimated height of the pattern is provided as input to the shadow model. The shading model produces occlusion contours used to generate predicted images. A set of predicted images is produced, each predicted image being associated with an estimated height. The estimated height corresponding to the predicted image that most closely matches the measured image is used as the height calculated by the shadow model.

Description

technical field [0001] The present disclosure relates generally to inspection of semiconductor wafers, and more specifically to determining the height of patterns on semiconductor wafers using shadow models. Background technique [0002] There are previously known techniques for measuring the dimensions of patterns located on semiconductor wafers. There is also a need to measure the height (or depth) of the pattern or specific features of the pattern, such as oxide grooves or fins of the device. One of the techniques for measuring altitude is known as the "shadow effect". The technique uses a detector located at a specific position relative to the pattern, where part of the responding electrons is not received by the detector due to occlusion by some parts of the pattern, such as side walls, thus creating a shadow. Contents of the invention [0003] The following is a simplified overview of the case in order to provide a basic understanding of some aspects of the case. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCG06T7/0004G06T7/60G06T2207/10061G06T2207/20076G06T2207/30148G06T7/507H01L22/10H01L22/20G06T7/001G06T7/564
Inventor 伊谢·施瓦茨班德谢尔盖·克里斯托严·阿夫尼尔
Owner APPL MATERIALS ISRAEL LTD