Integrated circuit test system and method

Abstract

The invention discloses an integrated circuit test system and method. The integrated circuit test system comprises: a probe card used for being connected with a to-be-tested target; a graphic signal generation module connected with the probe card and used for generating a test signal; and a man-machine interaction module connected with the graphic signal generation module, wherein the graphic signal generation module comprises a single-chip microcomputer and an FPGA unit, a test instruction is transmitted to the single-chip microcomputer through the man-machine interaction module, and the single-chip microcomputer controls the FPGA unit to generate a corresponding test signal and transmits the test signal to a to-be-tested target through the probe card. The graphic signal generation moduleis used as a core part, and the single-chip microcomputer in the module is used as a control unit to control the FPGA unit to generate a corresponding test signal, so that the size of the test systemcan be greatly reduced, the cost is reduced, and the reliability and usability of the test system are enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductor testing and analysis, and more specifically, to a process failure testing system and testing method. Background technique [0002] In the prior art, usually a plurality of ICs are manufactured in the form of dies on a semiconductor material wafer at a time, and the semiconductor wafer is divided after the manufacturing is completed to obtain a plurality of independent IC chips. Therefore, before being packaged separately and installed in each electronic system, the IC needs to be tested to evaluate its function, especially to ensure that it is not defective. [0003] Existing wafer testing machines are usually large in size, occupy a lot of space, are inconvenient to carry, cannot be carried, and can only support testing in fixed occasions, lack of flexibility and convenience, and this testing machine cannot be used alone, and needs to be tested through a PC Human-computer interaction has c...

AI Technical Summary

Problems solved by technology

[0003] Existing wafer testing machines are usually large in size, occupy a lot of space, and are inconvenient to carry. Human-computer interaction has certain network risks, and the operation interface is relatively complicated. Operators need to undergo multiple trainings before they can use it proficiently.

The equipment cost and labor cost are high, and it cannot be applied in a large area

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