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Output buffer circuit based on GaAs process

A technology for output buffering and circuits, applied in the direction of logic circuits, logic circuit connection/interface layout, electrical components, etc., can solve the problems that cannot meet the requirements of GaAs circuit level, meet the requirements of high performance, and ensure safety and reliability , the effect of small switching time

Pending Publication Date: 2020-04-14
CETC GUOJI SOUTHERN GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In CMOS integrated circuits, an inverter chain composed of multi-stage inverters is generally used as an output buffer circuit, but it cannot meet the level requirements in GaAs circuits.

Method used

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  • Output buffer circuit based on GaAs process
  • Output buffer circuit based on GaAs process
  • Output buffer circuit based on GaAs process

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Embodiment Construction

[0017] The technical solutions and beneficial effects of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0018] Such as figure 1 As shown, the present invention provides an output buffer circuit based on a GaAs process, including a first resistor R1, a second resistor R2, a first PHEMT transistor Q1, a second PHEMT transistor Q2, a third PHEMT transistor Q3, and a fourth PHEMT transistor Q4 , a first Schottky diode D1, a second Schottky diode D2, a third Schottky diode D3, a fourth Schottky diode D4, and a fifth Schottky diode D5;

[0019] The gate of the first PHEMT transistor Q1 is connected to the input signal IN, its drain is connected to the cathode of the first Schottky diode D1, the anode of the first Schottky diode D1 is connected to the cathode of the second Schottky diode D2, and the second Schottky diode D2 is connected to the cathode of the second Schottky diode D2. The anode of the Tertky diode D2 is connec...

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PUM

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Abstract

The invention discloses an output buffer circuit based on a GaAs process. The output buffer circuit comprises a first resistor, a second resistor, a first PHEMT tube, a second PHEMT tube, a third PHEMT tube, a fourth PHEMT tube, a first Schottky diode, a second Schottky diode and a fifth Schottky diode. The first resistor plays a role when an input signal is-5V, so that the second PHEMT and the third PHEMT are started, and a pull-down path is opened; and the second resistor plays a role when the input signal is-4.2 V, the fourth PHEMT is started, and the pull-up path is opened. The circuit charges an input level to a corresponding required level, plays a role in level shifting and current driving, and enables the switching time of an output circuit to be relatively short, thereby meeting the requirements of high performance of a system, and guaranteeing the safety and reliability of a chip.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to an output buffer circuit suitable for digital circuit driving based on GaAs technology. Background technique [0002] The output buffer circuit is an integral part of a complete chip design, and its performance is directly related to the stability of the entire system. The output buffer circuit is widely used in various digital circuits to further isolate the signal input terminal and the output terminal to avoid the influence of the signal input terminal on the load and enhance the ability to drive the load. In CMOS integrated circuits, an inverter chain composed of multi-stage inverters is generally used as an output buffer circuit, but it cannot meet the level requirements in GaAs circuits. [0003] Based on this, this case arose. Contents of the invention [0004] The purpose of the present invention is to provide an output buffer circuit based on ...

Claims

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Application Information

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IPC IPC(8): H03K19/01H03K19/0175
CPCH03K19/01H03K19/0175Y02B70/10
Inventor 潘晓枫林宗伟林瑞李颂江伦伯徐波
Owner CETC GUOJI SOUTHERN GRP CO LTD