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Semiconductor structure and method of forming the same

A technology of semiconductor and gate structure, applied in the field of semiconductor structure and its formation, can solve the problems of increased channel leakage current, shortened distance, poor gate-to-channel control capability, etc., so as to improve mobility and improve electrical performance, the effect of improving the hot carrier effect

Active Publication Date: 2022-07-26
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology

However, with the shortening of the channel length, the distance between the source and the drain of the transistor is also shortened, and the control ability of the gate to the channel becomes worse, resulting in the phenomenon of subthreshold leakage, the so-called short channel The short-channel effects (SCE) are more likely to occur, and the channel leakage current of the transistor increases

Method used

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  • Semiconductor structure and method of forming the same
  • Semiconductor structure and method of forming the same
  • Semiconductor structure and method of forming the same

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Embodiment Construction

[0013] Semiconductor devices still suffer from poor performance. The reasons for the poor performance of the device are now analyzed by combining the two semiconductor structures.

[0014] refer to figure 1 , showing a schematic structural diagram of a semiconductor structure.

[0015] The semiconductor structure includes: a base including a PMOS region I, the base including a substrate 10 and a semiconductor pillar 15 protruding from the substrate 10 , the material of the semiconductor pillar 15 in the PMOS region I is Si; a drain region 11 , located in the bottom of the semiconductor pillar 15 ; the gate structure 16 surrounds the semiconductor pillar 15 , the gate structure 16 covers the semiconductor pillar 15 and exposes the top of the semiconductor pillar 15 , the semiconductor covered by the gate structure 16 The pillar 15 serves as the channel layer 12 ; the source region 13 is located in the top of the semiconductor pillar 15 .

[0016] The material of the PMOS reg...

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Abstract

A semiconductor structure and a method for forming the same, the forming method includes: forming a base, the base includes a PMOS region, the base includes a substrate and a semiconductor pillar protruding from the substrate, the semiconductor pillar in the PMOS region includes a first semiconductor pillar and a semiconductor pillar located in the first semiconductor In the second semiconductor column on the column, the molar volume percentage of Ge in the second semiconductor column is greater than the molar volume percentage of Ge in the first semiconductor column; a PMOS drain region is formed in the bottom of the first semiconductor column in the PMOS region; after the PMOS drain region is formed , forming a gate structure surrounding the semiconductor column, the gate structure of the PMOS region covers the junction of the first semiconductor column and the second semiconductor column and exposes the top of the second semiconductor column, and the semiconductor column covered by the gate structure serves as the channel layer ; After the gate structure is formed, a PMOS source region is formed in the top of the second semiconductor pillar. The embodiments of the present invention are beneficial to improve the stability of the PMOS transistor, such as the hot carrier effect and the self-heating effect.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing in the direction of higher component density and higher integration, and the development trend of semiconductor process nodes following Moore's Law is decreasing. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase in the component density and integration of semiconductor devices, in order to adapt to the reduction of process nodes, the channel length of transistors must be continuously shortened. [0003] The shortening of the transistor channel length has the benefit of increasing the die density of the chip, increasing the switching speed, etc. However, with the shortening of the channel length, th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/092H01L29/36H01L21/8238
CPCH01L27/092H01L29/36H01L21/823885
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP
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