System and method for semiconductor chip surface topography metrology
A surface topography and semiconductor technology, applied in the field of metrology systems, can solve problems such as yield loss, interface topography defects, wafer edge mold opening, etc.
Active Publication Date: 2021-01-12
YANGTZE MEMORY TECH CO LTD
View PDF21 Cites 3 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
For example, interface topography defects can cause die opening issues at the wafer edge during the bonding process, resulting in severe yield loss or degradation
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0039] While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the present disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may also be used in a variety of other applications.
[0040] It should be noted that references in the specification to "one embodiment," "an embodiment," "exemplary embodiment," "some embodiments," etc., indicate that the described embodiments may include particular features, structures, or characteristics, but each embodiment may not necessarily include that particular feature, structure or characteristic. Furthermore, such phrases are not necessarily referring to the same embodiment. In addition, when a particular feature, structure or characteristic is described in conjun...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
| Property | Measurement | Unit |
|---|---|---|
| width | aaaaa | aaaaa |
| width | aaaaa | aaaaa |
Login to View More
Abstract
Embodiments of systems and methods for measuring surface topography of semiconductor chips are disclosed. In one example, a method for measuring surface topography of a semiconductor chip is disclosed. A plurality of interference signals is received by at least one processor, each interference signal corresponding to a respective one of the plurality of locations on the surface of the semiconductor chip. The plurality of interference signals are transformed by at least one processor into a plurality of spectral signals, each spectral signal corresponding to a respective one of the locations on the surface of the semiconductor chip. The model is used by at least one processor to classify the spectral signals into a plurality of classes. Each of these classes corresponds to an area of the same material on the surface of the semiconductor chip. A surface height offset between the surface baseline and at least one of the classes is determined by at least one processor based at least in part on a calibration signal associated with an area corresponding to the at least one of the classes. A surface topography of the semiconductor chip is characterized by at least one processor based at least in part on the surface height offset and the interference signal.
Description
technical field [0001] Embodiments of the present disclosure relate to metrology systems and methods in semiconductor manufacturing. Background technique [0002] Surface topography is an important surface property, and it affects the performance of semiconductor products and their manufacturing processes. For example, wafer bonding processes have been increasingly used in semiconductor devices to achieve innovative stacked structures. The topography that defines the flatness of the wafer surface is one of the most critical factors for achieving good bonding results. A successful bonding process requires ultra-precise alignment of the two wafers, as well as planarization of the bonding interface. For example, interface topography defects can cause die opening problems at the wafer edge during the bonding process, resulting in severe yield loss or degradation. Contents of the invention [0003] Embodiments of systems and methods for measuring surface topography of semico...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): G01B11/24
CPCG01B11/2441G01B9/02029G01B9/02057G01B9/02072G01B9/02075G01B9/02083G01B9/02084G01B9/0209G01B11/0608G01B2210/56G01B9/02091
Inventor 王思聪丁小叶周毅
Owner YANGTZE MEMORY TECH CO LTD