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Semiconductor memory device

A memory and semiconductor technology, applied in the direction of semiconductor devices, static memory, read-only memory, etc., can solve the problem of reduced operational reliability of three-dimensional semiconductor memory devices

Pending Publication Date: 2020-11-20
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The operational reliability of a three-dimensional semiconductor memory device may decrease due to various reasons

Method used

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  • Semiconductor memory device
  • Semiconductor memory device
  • Semiconductor memory device

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Embodiment Construction

[0015] The specific structural description or functional description disclosed herein is merely an illustration for the purpose of describing an embodiment of the concept according to the present disclosure. Embodiments according to the concept of the present disclosure may be implemented in various forms and should not be construed as being limited to the embodiments set forth herein.

[0016] An example of the embodiment will be described with reference to the drawings. Examples of implementations are described herein with reference to cross-sectional illustrations that are schematic illustrations of examples of implementations (and intermediate structures). As such, variations in the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances are to be expected. Thus, embodiments should not be construed as limited to the particular shapes illustrated herein but may be to include deviations in shapes that result, for example, from man...

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Abstract

A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array disposed on a substrate, a bit line connected to the memory cell array, a peripheral circuit disposed between the memory cell array and the substrate, the peripheral circuit including a transistor, a conductive line disposed between the memory cell array and the transistor, a lower connection structure connecting the conductive line and the transistor, and two or more upper connection structures connecting the bit line and the conductive line, the two or more upper connection structures being spaced apart from each other.

Description

technical field [0001] The present disclosure relates generally to semiconductor memory devices, and more particularly, to three-dimensional semiconductor memory devices. Background technique [0002] A semiconductor memory device includes memory cells capable of storing data. In order to increase the degree of integration of memory cells, three-dimensional semiconductor memory devices have been proposed. [0003] Various three-dimensional semiconductor memory devices have been developed to increase their integration and stability. The operational reliability of a three-dimensional semiconductor memory device may decrease due to various reasons. Contents of the invention [0004] According to an embodiment of the present disclosure, there can be provided a semiconductor memory device including: a memory cell array provided on a substrate; a bit line connected to the memory cell array; a peripheral circuit provided on the memory cell array and the substrate, the peripher...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/02G11C5/06H01L27/11565H01L27/1157H01L27/11573H01L27/11582
CPCG11C5/02G11C5/06H10B43/35H10B43/10H10B43/40H10B43/27G11C5/025G11C5/063G11C16/06H10B41/10H10B41/27G11C16/0483G11C16/10
Inventor 李相宪许炫
Owner SK HYNIX INC