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Apparatuses and methods for controlling word line discharge

A technology for equipment and control signals, applied in the direction of digital memory information, information storage, static memory, etc., can solve problems such as the increase in the rate of data degradation

Pending Publication Date: 2020-12-25
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Repeated access to a particular subwordline (commonly referred to as 'row hammering') can cause an increased rate of data degradation in nearby subwordlines

Method used

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  • Apparatuses and methods for controlling word line discharge
  • Apparatuses and methods for controlling word line discharge
  • Apparatuses and methods for controlling word line discharge

Examples

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Embodiment Construction

[0019] Certain details are set forth below in order to provide a thorough understanding of examples of various embodiments of the present disclosure. It will be apparent, however, to one skilled in the art that the examples described herein may be practiced without these specific details. Furthermore, specific examples of the disclosure described herein should not be construed to limit the scope of the disclosure to those specific examples. In other instances, well-known circuits, control signals, timing protocols and software operations have not been shown in detail in order to avoid unnecessarily obscuring the embodiments of the present disclosure. In addition, terms such as "couples and coupled" mean that two components may be directly or indirectly electrically coupled. Indirect coupling may imply that two components are coupled through one or more intermediate components.

[0020] A semiconductor memory device may include hierarchically structured main word lines and su...

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Abstract

Apparatuses and methods for controlling the word line discharge are described. The rate of discharge and / or the voltage level discharged to may be controlled. In some embodiments, a main word line maybe driven to multiple low potentials to control a discharge of a subword line. In some embodiments, a first word driver line signal and / or a second word driver line signal may be reset to control a discharge of a subword line. In some embodiments, a combination of driving the main word line and the first word driver line signal and / or the second word driver line signal resetting may be used to control a discharge of the subword line.

Description

technical field [0001] The present application relates to semiconductor memory devices, and more particularly to an apparatus and method for controlling word line discharge. Background technique [0002] A semiconductor memory device, represented by a dynamic random access memory (DRAM), includes an array of memory cells having memory cells disposed at intersections between word lines and bit lines. A semiconductor memory device may include hierarchically structured main word lines and sub word lines. The main word line is the word line located at the upper level and is selected by the first part of the row address. A sub word line is a word line positioned at a lower level and is selected based on a corresponding main word line (MWL) and a word driver line (FXL) selected by the second part of the row address. [0003] An array of memory cells included in a semiconductor memory device, such as a DRAM, may be divided into multiple memory tiles to reduce wiring capacitance o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/408G11C8/08
CPCG11C11/4085G11C8/08G11C11/4076G11C11/4097G11C11/4087
Inventor 佐藤敏行宫武伸一
Owner MICRON TECH INC