Fully-surrounded gate fin field effect transistor and manufacturing method thereof
A technology of fin field effect and fully surrounded gate, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc. Leakage and punch-through problems, effects of eliminating effects
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0044] Such as Figure 1A As shown, it is a three-dimensional view of the gate fin field effect transistor fully surrounded by the embodiment of the present invention; Figure 1B shown, is along the Figure 1A The cross-sectional view corresponding to the dotted line surface 101 in the figure; the embodiment of the present invention fully surrounds the gate fin field effect transistor including:
[0045] A fin body formed on a semiconductor substrate 1 , on which an active region 2 , a drain region 3 and a plurality of fully-enclosed channel structures 4 are formed.
[0046] In the embodiment of the present invention, the semiconductor substrate 1 includes a silicon substrate.
[0047] The fin body is formed by etching the semiconductor substrate 1 .
[0048] The width of the fin body at the position of the source region 2 and the drain region 3 is greater than the width of the fin body at the corresponding position of the fully surrounding channel structure 4 .
[0049] An ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


