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A connector for realizing multi-face interconnection and its manufacturing method

一种连接器、高度方向的技术，应用在电子器件封装结构领域，能够解决电信号传输路径长、成本高、空间利用率低等问题

Active Publication Date: 2021-08-10
ZHUHAI ADVANCED CHIP CARRIERS & ELECTRONICS SUBSTRATE SOLUTIONS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] 1. Only stacking in the "Z" direction can be used, and the space utilization rate is low;
[0008] 2. The electrical connection in the "X" and "Y" directions can only be realized by wire bonding, which has high cost, long transmission path of electrical signals, and low space utilization;

Method used

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  • A connector for realizing multi-face interconnection and its manufacturing method
  • A connector for realizing multi-face interconnection and its manufacturing method
  • A connector for realizing multi-face interconnection and its manufacturing method

Examples

Experimental program
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Embodiment Construction

[0091] Referring to FIG. 1( a ), there is shown a cross-sectional view of a connector 100 for multi-faceted interconnection. The connector 100 includes: a first dielectric layer 101 between the first circuit layer 110 and the second circuit layer 112; Copper column layer 120; the second dielectric layer 102 on the first circuit layer 110; the third circuit layer 114 on the second dielectric layer 102; and the vertical second copper column connecting the third circuit layer 114 Layer 122, an opening is formed in the second dielectric layer 102 to expose the first wiring layer 110, and the second copper post layer 122 is exposed toward the side faces of the first dielectric layer 101 and the side end faces of the second dielectric layer 102 . A solder resist layer 170 is formed on the second wiring layer 112 and the third wiring layer 114 . The connector 100 can be electrically connected to the side through the second copper column layer 122 exposed on the side end surface, th...

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PUM

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Abstract

The invention discloses a connector for multi-face interconnection, which is characterized in that the connector comprises: a first dielectric layer between a first circuit layer and a second circuit layer; The first copper column layer connecting the first wiring layer and the second wiring layer in the layer; the second dielectric layer on the first wiring layer; the third wiring layer on the second dielectric layer a wiring layer; and a vertical second copper column layer connected to the third wiring layer, wherein an opening is formed in the second dielectric layer to expose the first wiring layer, and the second copper The pillar layer exposes side faces toward side end faces of the first dielectric layer and the second dielectric layer.

Description

technical field [0001] The invention relates to an electronic device packaging structure, in particular to a multi-faceted interconnected connector structure and a manufacturing method thereof used in semiconductor packaging. Background technique [0002] With the development of industry, people are pursuing lighter, thinner and smaller consumer electronics while adding more and more functions. size, which has posed a great challenge to the process and equipment. However, different parallel packages usually have different heights, so there is still room for further reduction for parallel devices and packages. Realizing side electrical connections between different devices and packages will provide a solution for the utilization of package space. [0003] The commonly used way to increase package density is to achieve 3D stacking interconnection, such as multi-layer bonding after stacking chips, or using TSV (Through Silicon Via) to realize multi-chip three-dimensional inter...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498H01L23/538H01L21/48
CPCH01L23/49822H01L23/49838H01L23/49805H01L23/5383H01L23/5386H01L21/4857H01L23/13H01L23/49833H01L24/20H01L23/481H01L23/522H01L24/19H01L2224/19H01L2224/20H01L23/53228H01L24/14
Inventor 陈先明冯磊黄本霞洪业杰
Owner ZHUHAI ADVANCED CHIP CARRIERS & ELECTRONICS SUBSTRATE SOLUTIONS TECH