Polysilicon gate forming method of CIS device

Abstract

The invention discloses a polysilicon gate forming method of a CIS device, and relates to the field of semiconductor manufacturing. The method comprises the following steps: forming a gate oxide layeron a substrate; forming a polycrystalline silicon layer on the surface of the gate oxide layer; forming a hard mask layer on the surface of the polycrystalline silicon layer, wherein the hard mask layer is composed of a silicon nitride layer and a low-temperature oxide layer; forming a gate pattern of a pixel region and a gate pattern of a logic region in the hard mask layer through photoetchingand etching processes; etching the polycrystalline silicon layer according to the gate pattern of the pixel region and the gate pattern of the logic region to form a gate of the pixel region and a gate of the logic region; carrying out secondary oxidation treatment on the gate of the pixel region and the gate of the logic region; and removing residual silicon nitride on the surface of the gate. Aproblem that in the manufacturing process of an existing CIS device, an oxide film at the top of a polysilicon gate influences the dosage of ions injected into the polysilicon gate during subsequent source-drain injection is solved. And the effects of optimizing the injection condition of the polycrystalline silicon and improving the performance of the CIS device are achieved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to a method for forming a polysilicon gate of a CIS device. Background technique [0002] In the manufacturing process of CIS (CMOS Image Sensor, image sensor) products, after etching to form the polysilicon gate, if the residual oxide layer in the pixel area is too thin, it will cause damage to the silicon surface of the pixel area during the process, resulting in The device leakage is too large to form a dark current, which in turn affects the pixel performance. However, if the residual oxide layer in the pixel area is too thick, the dose of ions implanted into the polysilicon gate will be reduced when the source and drain implants are performed in the logic area, resulting in depletion of polysilicon and affecting chip performance. [0003] In the current production process of CIS products, before forming the polysilicon gate, a hard mask (oxide) is formed on...

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Problems solved by technology

[0002] In the manufacturing process of CIS (CMOS Image Sensor, image sensor) products, after etching to form the polysilicon gate, if the residual oxide layer in the pixel area is too thin, it will cause damage to the silicon surface of the pixel area during the process, resulting in The device leakage is too large to form a dark current, which affects the pixel performance

However, if the residual oxide layer in the pixel area is too thick, the dose of ions implanted into the polysilicon gate will be reduced when the source and drain implants are performed in the logic area, resulting in the depletion of polysilicon and affecting chip performance.

[0003] In the current production process of CIS products, before forming the polysilicon gate, a hard mask (oxide) is formed on the surface of the polysilicon layer. After polysilicon etching and secondary oxidation, the remaining hard mask layer will cause polysilicon gate There is a thicker oxide film on the top of the gate, which will affect the ion dose implanted into the polysilicon gate during the subsequent source and drain implantation.

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