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Task scheduling optimization method for power chip hybrid multi-core system

A task scheduling, multi-core system technology, applied in multi-programming devices, electrical digital data processing, program startup/switching and other directions, can solve problems such as unsatisfactory scheduling results

Pending Publication Date: 2021-04-16
ZHEJIANG UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

These methods do not take into account that different tasks are located in different positions in the application program. When they are assigned the same energy consumption constraints, their impact on the overall scheduling length is different, which makes the final scheduling result unsatisfactory.

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  • Task scheduling optimization method for power chip hybrid multi-core system
  • Task scheduling optimization method for power chip hybrid multi-core system
  • Task scheduling optimization method for power chip hybrid multi-core system

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Embodiment Construction

[0074] In order to make the purpose, technical solution and technical effect of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0075] Such as figure 1 As shown, a task scheduling optimization method for power chip hybrid multi-core systems of the present invention uses a DAG graph to represent a program model, and the application program model G={N, W, C}, where N={n 1 , n 2 ,...} is the set of tasks, that is, the set of nodes in the program G, W is a matrix of |N|×|U|, C represents the set of communication time between tasks, U={u 1 , u 2 ,...,u |U|}Represents a group of heterogeneous processors, |U represents the number of processors of U, for the convenience of description, define: each node n i ∈N represents a task; c {i,j} ∈C means from task n i to n j The communication time between, if c {i,j} =0, means slave task n i to n j There is no communication between; w {i,...

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Abstract

The invention belongs to the field of electric power chips, and relates to a task scheduling optimization method for a power chip hybrid multi-core system, which comprises the following steps: calculating an upward value of each task in an application program, determining a task priority, determining pre-distribution energy consumption of each task by using an energy consumption pre-distribution strategy, and according to a descending order of the priorities, sequentially selecting a task, and calculating the energy consumption constraint of the task; scheduling the task to each processor core, traversing all task execution frequencies, finding out a processor core and frequency combination which meets the energy consumption constraint of the task and enables the task end time to be earliest, and repeating the operation until all tasks are scheduled; obtaining a task scheduling result, finally finding out a task which can be subjected to frequency readjustment, calculating an energy consumption value which can be saved after the operation time of the found task is prolonged to the maximum extent, and distributing the energy consumption to the task which directly influences the overall scheduling length so as to improve the operation frequency and achieve the purpose of shortening the overall scheduling length.

Description

technical field [0001] The invention belongs to the field of hybrid multi-core systems, and relates to a task scheduling optimization method for power chip hybrid multi-core systems. Background technique [0002] In traditional power computing, the data collected by each power terminal will be transmitted to the master station for centralized processing. In the power Internet of Things, various growing power terminal equipment and business applications will generate massive amounts of data. The transmission and processing of these data will put a huge pressure on the main station, and the high delay and security cannot meet the requirements of new business forms. requirements. Edge computing provides services on the nearest user side, delegating a large amount of calculations to the execution end to reduce the pressure on the main station, meet the real-time data analysis and processing and low-latency business requirements, reduce operation and maintenance costs, and impro...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06F9/50G06F1/329G06F1/324
CPCY02D10/00
Inventor 黄凯井铭李鹏习伟姚浩蒋小文陈思恒陶伟徐文渊彭勇刚刘智力
Owner ZHEJIANG UNIV