Device and method for executing floating point logarithm operation
A logarithmic and floating-point technology, applied in computing, electrical digital data processing, digital data processing components, etc., can solve problems such as large calculation delays
Pending Publication Date: 2021-05-11
SHENZHEN INSTITUTE OF INFORMATION TECHNOLOGY
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Problems solved by technology
This bit-by-bit method can obtain higher calculation accuracy, but the result accuracy is proportional to the number of iterations, so it has a very large calculation delay under the high-precision calculation requirements
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[0033] In order to further describe the technical solution of the present invention in detail, this embodiment is implemented on the premise of the technical solution of the present invention, and provides detailed implementation methods and specific steps.
[0034] The logarithmic function cannot be directly calculated by the CORDIC algorithm. It is necessary to transform the logarithmic function into an inverse hyperbolic tangent function that the algorithm can handle, such as formula (1):
[0035]
[0036]The improved four-step parallel branched CORDIC algorithm based on the hyperbolic CORDIC algorithm proposed by the present invention, the traditional CORIDC algorithm belongs to the bit-by-bit method, can obtain higher calculation accuracy, but the result accuracy is proportional to the number of iterations, so under the high-precision calculation requirements There is a very large calculation delay. In the four-step parallel branch CORDIC algorithm proposed by the pres...
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The invention discloses a device and a method for executing floating point logarithm operation. A preprocessing and exception handling module is used for preprocessing an input floating point logarithm before calculation, detecting legality of the input floating point logarithm and handling exceptional input; a mantissa logarithm operation module is used for receiving a decoding result obtained by the preprocessing and exception processing module, realizing mantissa logarithm iterative operation on a mantissa bit M'obtained by decoding based on a four-step parallel branch CORDIC algorithm, and transmitting a result to an addition merging unit; an exponential multiplication module is used for receiving and calculating an exponential bit e obtained by decoding of the preprocessing and exception processing module; and an addition merging module is used for receiving output results of the above modules, merging the output results and then carrying out rounding calculation and floating-point normalized output. According to the method, the number of iterations needed by calculation is greatly reduced, and only 37 clock cycles are needed for completing one-time logarithmic function operation.
Description
technical field [0001] The invention relates to the technical field of logarithmic operations, in particular to a device and method for performing floating-point logarithmic operations. Background technique [0002] In application scenarios such as scientific computing and weather forecasting, a large number of floating-point logarithmic function calculations are used. The current hardware processor does not include the basic operation hardware unit of the logarithmic function, and still uses the software library function to convert the function into an approximate algebraic function for solution through iterative approximation and other methods. This type of method often needs to call various floating-point calculation subroutines frequently, and the calculation efficiency is low. In addition, with the development of scientific computing, the requirements for calculation accuracy are also increasing. General double-precision calculations can no longer meet the application ...
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IPC IPC(8): G06F7/483G06F7/485G06F7/487
CPCG06F7/483G06F7/485G06F7/4876
Inventor 刘明周彦兵周小明孙冲武赵学华
Owner SHENZHEN INSTITUTE OF INFORMATION TECHNOLOGY