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Resistive random access memory array and manufacturing method thereof

A technology of resistive random access memory, applied in the direction of electric solid devices, circuits, electrical components, etc., can solve the problems of increasing process complexity, production time and production cost, complex circuit design, occupation, etc., to increase the operating window. The effect of chaos and complexity reduction

Pending Publication Date: 2021-05-11
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, such a method requires complex circuit design, greatly increasing process complexity, production time and production cost
Furthermore, this additional control circuit will also occupy a large available space, which is not conducive to the miniaturization of memory devices.

Method used

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  • Resistive random access memory array and manufacturing method thereof
  • Resistive random access memory array and manufacturing method thereof
  • Resistive random access memory array and manufacturing method thereof

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Embodiment Construction

[0027] In order to make the purpose, features and advantages of the present invention more comprehensible, preferred embodiments are listed below and described in detail in conjunction with the accompanying drawings.

[0028] Figure 1A to Figure 1F It is a schematic cross-sectional view corresponding to each step of the manufacturing method of the resistive random access memory array 100 in some embodiments of the present invention. Please refer to Figure 1A , a substrate 102 is provided, and the array area of ​​the substrate 102 includes a first area 10 and a second area 20 . Next, an insulating layer 104 is formed on the substrate 102 . Materials of the substrate 102 may include bulk semiconductor substrates (eg, silicon substrates), compound semiconductor substrates (eg, Group IIIA-VA semiconductor substrates), silicon-on-insulator (SOI) substrates, and the like. The substrate 102 can be a doped or undoped semiconductor substrate. In some embodiments, substrate 102 is ...

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Abstract

The invention provides a resistive random access memory array and a manufacturing method thereof. The resistive random access memory array comprises a substrate, and an array region of the substrate comprises a first region and a second region. The resistive random access memory array includes a bottom electrode layer on a substrate, an oxygen ion storage layer on the bottom electrode layer, a diffusion barrier layer on the oxygen ion storage layer, a resistance conversion layer on the diffusion barrier layer, and a top electrode layer on the resistance conversion layer. The diffusion barrier layer in the first region is different from the diffusion barrier layer in the second region.

Description

technical field [0001] The present invention relates to a memory device, and more particularly to a resistive random access memory array and a manufacturing method thereof. Background technique [0002] In an existing resistive random access memory (RRAM), a plurality of memory cells are included in an array region of a chip, and each memory cell includes a patterned bottom electrode layer, a resistance switching layer and a top electrode layer. When a forming voltage or a writing voltage is applied to the memory cell, the oxygen ions will be driven by the voltage to leave the resistance switching layer. The equivalent positive-valent oxygen vacancies left in the resistance switching layer form conductive paths (or conductive filaments), thereby converting the resistance switching layer from a high-resistance state to a low-resistance state. When an erase voltage is applied, the oxygen ions return to the resistive switching layer and combine with equivalent positive-valent ...

Claims

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Application Information

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IPC IPC(8): H01L45/00H01L27/24
CPCH10B63/80H10N70/801H10N70/24H10N70/011
Inventor 傅志正林铭哲
Owner WINBOND ELECTRONICS CORP