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Multi-chip compatibility test method and device

A technology for chip testing and testing equipment, which is used in measuring equipment, electronic circuit testing, measuring electricity and other directions to achieve the effect of reducing development and improving work efficiency

Inactive Publication Date: 2021-05-14
杭州加速科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a multi-chip testing method and device to solve problems such as simultaneous compatibility testing of multiple chips in the existing chip testing technology

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Embodiment Construction

[0029] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is an embodiment of a part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0030] It should be noted that the terms "first" and "second" in the description and claims of the present invention and the above drawings are used to distinguish similar objects, but not necessarily used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate ...

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Abstract

The invention discloses a multi-chip testing method and device, and relates to the technical field of chip testing. Testing equipment introduces all testing resources in the testing equipment into a chip testing circuit board through a resource wire harness via an interface connector; and each test resource realizes the detection of a to-be-tested chip on a corresponding chip test seat through the switching of a relay in a universal resource switching module. The method and the device have the advantages that the problem of compatibility test of each chip is solved, the development and test time is shortened, and the working efficiency is improved.

Description

technical field [0001] The invention belongs to the technical field of chip testing, and in particular relates to a multi-chip testing method and device. Background technique [0002] The chip testing device in the prior art basically completes the testing of the chip through the control of a computer. The above-mentioned chip testing device is composed of three parts, namely a computer, a testing device and a chip testing circuit board. The specific test process is: according to the function of the chip to be tested, the required test vector is compiled in the computer, the converted program drives the signal pin of the test equipment to output the required signal, and then the chip test circuit board runs. The test method corresponding to the above-mentioned chip test device has the following disadvantages: [0003] 1. Debugging is difficult. The actual application environment of the chip is very different from the test environment of the chip, which leads to a series of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2851G01R31/2884
Inventor 邬刚周辉
Owner 杭州加速科技有限公司