Formation method of semiconductor structure
A semiconductor and body layer technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of unstable performance of fin field effect transistors and increased difficulty in the process of fin field effect transistors.
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[0019] It can be seen from the background art that with the further progress of the process node of the semiconductor technology, it is more difficult to form a Fin Field Effect Transistor (Fin FET). At the 14nm technology node and below, an in-situ water vapor generation (ISSG) process is usually used to generate a gate oxide layer on the surface of the fin. When ISSG is used to generate the gate oxide, the silicon in the fin is consumed, ie, the critical dimension (CD) of the fin is lost. When the CD of the fin is large, it can bear the consumption of silicon. However, at the 14nm technology node and below, since the CD of the fin is already small, bearing the consumption of silicon is not conducive to the performance of the semiconductor structure.
[0020] In order to solve the above problems, the inventor has studied and provided a method for forming a semiconductor structure. Before forming a gate oxide layer on the surface of the fin, a silicon layer is first deposited ...
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