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Anti-transient dose rate upset reinforced DSP circuit

A dose rate and transient technology, applied in the field of anti-transient dose rate inversion to strengthen DSP circuits, which can solve problems such as usage limitations, unstable operation of DSP circuits, transient dose rate inversion in SRAM storage areas and register areas, etc.

Inactive Publication Date: 2021-06-22
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The digital signal processor (DSP) chip is the core device for data processing and communication control. In the case of γ-ray bombardment of the DSP circuit, the SRAM storage area and register area in the circuit are prone to transient dose rate reversal, which can lead to DSP operating state Errors make the DSP circuit run unstable or even fail
[0003] The DSP circuit without anti-transient dose rate reversal reinforcement is subject to certain restrictions in the nuclear radiation environment
DSP circuits are more and more widely used in nuclear radiation environments, and there are almost no literature and patents on the anti-transient dose rate flipping reinforcement of DSP circuits at home and abroad.

Method used

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  • Anti-transient dose rate upset reinforced DSP circuit
  • Anti-transient dose rate upset reinforced DSP circuit
  • Anti-transient dose rate upset reinforced DSP circuit

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Embodiment 1

[0016] see Figure 1-2 , the present embodiment provides an anti-transient dose rate inversion hardening DSP circuit, the DSP circuit implements anti-transient dose rate inversion reinforcement on the unit and module, including adopting anti-transient dose rate inversion self-refresh three-mode sequential unit and adopting The on-chip memory reinforced by the DICE storage unit, the function of the DSP circuit is to realize the operation and processing of digital signals, and at the same time perform serial communication and data interaction with external devices, which can improve the anti-nuclear radiation performance of the circuit.

[0017] see figure 1 , DSP core with anti-transient dose rate reversal 1, on-chip hardened memory 2, clock management 3, data interface 4, address interface 5, external memory interface 6, on-chip data bus 7, on-chip address bus 8, and enhanced Type field bus ECAN, multi-channel buffer interface McBSP, serial peripheral interface SPI, serial co...

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Abstract

The invention discloses an anti-transient dose rate upset reinforced DSP circuit, which realizes anti-transient dose rate upset reinforcement on units and modules, and comprises an on-chip memory reinforced by adopting an anti-transient dose rate upset self-refreshing three-mode time sequence unit and a DICE memory unit, and the anti-transient dose rate upset reinforced DSP circuit, the invention discloses an anti-transient dose rate upset reinforced DSP circuit which is composed of a DSP kernel, an on-chip reinforced memory, a clock manager, an on-chip peripheral and an on-chip address data bus, a kernel peripheral register of the anti-transient dose rate upset reinforced DSP circuit adopts a self-refreshing triple modular redundancy timing unit, the anti-transient dose rate upset reinforced DSP circuit adopts a redundancy reinforced structure for an on-chip SRAM memory, and the on-chip address data bus adopts a self-refreshing triple modular redundancy timing unit. Comprising a 12-tube storage bit unit, dual redundancy of a data input and output circuit, a DICE structure of an address input circuit and filtering of a clock. The anti-transient dose rate upset reinforcement measure is carried out on the on-chip SRAM memory from the register time sequence unit, so that the whole circuit has the anti-transient dose rate upset performance.

Description

technical field [0001] The invention relates to the related technical field of anti-radiation of digital signal processors, in particular to an anti-transient dose rate reversal reinforced DSP circuit. Background technique [0002] In the nuclear radiation environment, the integrated circuit is impacted by the transient dose rate, which manifests as transient dose rate reversal and transient dose rate latch phenomenon inside the chip. When the high-energy γ-ray hits the storage area of ​​the chip, the instantaneous pulse acts on the PN junction in the chip to generate an instantaneous photocurrent, which causes the state of the storage bit to change and the stored data to flip. This phenomenon is the transient dose rate flip. The digital signal processor (DSP) chip is the core device for data processing and communication control. In the case of γ-ray bombardment of the DSP circuit, the SRAM storage area and register area in the circuit are prone to transient dose rate revers...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/02G11C11/413
CPCG11C7/02G11C11/413
Inventor 薛海卫沈婧
Owner 58TH RES INST OF CETC