Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a semiconductor substrate in which a first drift region is formed; a gate structure is formed on the semiconductor substrate, and a part of the gate structure covers a part of the first drift region; and a first groove is formed in the first drift region, and a drain region is formed in the semiconductor substrate at the bottom of the first groove. According to the semiconductor device and the manufacturing method thereof provided by the invention, the groove is formed in the drift region, and the drain region is formed in the semiconductor substrate at the bottom of the groove, so that the length of the drift region is longitudinally prolonged, the bearing voltage of the semiconductor device is improved, and meanwhile, the area of the semiconductor device is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, lateral double diffused metal oxide semiconductor field effect transistor (Lateral Double Diffused MOSFET, LDMOS) devices and extended drain metal oxide semiconductor (Extended Drain Metal Oxide Semiconductor, EDMOS) devices have relatively low operating voltage High, simple process, and easy to be compatible with low-voltage CMOS circuits in process, it is widely used. Compared with ordinary MOS devices, both LDMOS and EDMOS have a lightly doped implanted region at the drain, which is called a drift region. Since LDMOS and EDMOS are usually used in power circuits and need to obtain higher output power, they must be able to withstand higher breakdown voltage. [0003] At present, LDMOS and EDMOS are both silicon surface dev...

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Problems solved by technology

[0003] At present, LDMOS and EDMOS are both silicon surface devices. As a transistor designed for a specific working voltage range, while obtaining a certain withstand voltage, it is necessary to reduce the on-resistance of the transistor as much as possible. The on-resistance is mainly composed of channel (channel) + junction field The effect tube region (JFET) + drift region (Drift) consists of three parts. The higher the operating voltage level of the device, the higher the ratio of the drift region to the entire on-resistance; but the withstand voltage is carried by the lateral drift region. The length of the drift region of the voltage-resistant transistor is certain, or there is a lower limit (the physical limit of silicon voltage resistance), so the size of the drift region cannot be reduced without limit. Even if the process feature size is reduced, the voltage resistance size cannot be reduced. of

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