Semiconductor device terminal structure, and manufacturing method thereof and semiconductor device
A technology of terminal structure and manufacturing method, which is applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problem that the device voltage is difficult to reach the highest withstand voltage, and achieve the effects of increasing the maximum withstand voltage, improving efficiency, and reducing process difficulty
Active Publication Date: 2021-08-03
JILIN SINO MICROELECTRONICS CO LTD
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However, in the actual process, factors such as photolithography CD, trench field oxide layer formation process, and trench etching width uniformity will affect this optimization ratio, making it difficult for the device voltage to reach the highest withstand voltage.
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[0038] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. The components of the embodiments of the application generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations.
[0039] Accordingly, the following detailed description of the embodiments of the application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art w...
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The embodiment of the invention provides a semiconductor device terminal structure, and a manufacturing method thereof and a semiconductor device, the semiconductor device terminal structure comprises: a shield gate groove, wherein the inner side of the shield gate groove is covered with a first insulating oxide layer, and the shield gate groove is provided with first polycrystalline silicon; and an isolation groove which is internally provided with a second insulation oxide layer, wherein the first insulation oxide layer in the isolation groove is communicated with the second insulation oxide layer in the shield gate groove. An isolation groove filled with an insulating oxidation material is arranged between two adjacent shield gate grooves at a terminal, and the isolation groove isolates epitaxial layer regions defined by the shield gate grooves, so that the epitaxial layer region in an active region close to the isolation groove and the epitaxial layer region in the deep position of the active region have basically the same electric field distribution; and therefore, the highest withstand voltage of the terminal structure is effectively improved, the process difficulty of chip manufacturing is reduced, and the chip manufacturing efficiency can be improved.
Description
technical field [0001] The present application relates to the technical field of semiconductor devices, in particular, to a semiconductor device terminal structure, a manufacturing method and a semiconductor device. Background technique [0002] At present, in the semiconductor device technology, the Oxide-Bypassed OB technology of the trench structure is widely used, and is used in low-voltage MOSFETs and Trench Schottky (TMBS) and other devices. For Fastrecovery diodes (Fastrecovery diode, FRD) and insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) devices are also used, among which shielded gate MOSFET devices are typical mass-produced products. In the terminal structure of such semiconductor devices, such as figure 1 at the terminal ( figure 1 Shown at A), gate PAD ( figure 1 The position shown in B) is mainly composed of the trench and the field oxide layer with a specified thickness attached to the inner surface of the trench and the polycry...
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IPC IPC(8): H01L29/40
CPCH01L29/407H01L29/404H01L29/401
Inventor 李强刘维张海宇杨彦刚左义忠姜明宝
Owner JILIN SINO MICROELECTRONICS CO LTD