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Etching method of indium tin oxide layer and manufacturing method of chip

A technology of indium tin oxide layer and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve problems such as uneven edge etching, large CDBias, and affecting chip luminous performance

Inactive Publication Date: 2021-09-28
CHONGQING KONKA PHOTOELECTRIC TECH RES INST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of the above-mentioned deficiencies in the prior art, the purpose of this application is to provide a method for etching an indium tin oxide layer and a method for manufacturing a chip, aiming at solving the problem of uneven edge etching, CDBias is large, which affects the chip's luminous performance

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  • Etching method of indium tin oxide layer and manufacturing method of chip
  • Etching method of indium tin oxide layer and manufacturing method of chip

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Embodiment Construction

[0021] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Preferred embodiments of the application are shown in the accompanying drawings. However, the present application can be embodied in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the application more thorough and comprehensive.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terminology used herein in the description of the application is only for the purpose of describing specific embodiments, and is not intended to limit the application.

[0023] The fabrication process of the ITO layer of the chip usually includes the ...

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Abstract

The invention relates to an etching method of an indium tin oxide layer and a manufacturing method of a chip. The etching method of the indium tin oxide layer comprises the following step of carrying out dry etching on the indium tin oxide layer by adopting etching gas, wherein the etching gas comprises gaseous saturated alkane. The gaseous saturated alkane is used as the etching gas to perform dry etching on an ITO layer, and the product in the process is low in boiling point, easy to volatilize and easy to discharge in the etching process, so that the etching process of the ITO layer can be promoted, and the method has high etching efficiency. Moreover, through the dry etching process, the etching burr phenomenon of the ITO layer can be effectively improved, so that the light-emitting reliability of the LED chip is improved. Meanwhile, ITO etching CD Bias can be reduced, the overall coverage area proportion of ITO can be increased, and thus the light-emitting performance of an LED chip, especially a Micro LED chip can be obviously improved.

Description

technical field [0001] The invention relates to the technical field of chip manufacturing, in particular to an etching method for an indium tin oxide layer and a chip manufacturing method. Background technique [0002] In the current LED, semiconductor and panel industries, the etching of the ITO layer (indium tin oxide layer) usually adopts a wet etching process, which mainly achieves the purpose of etching through the chemical reaction between the etching solution and the ITO film. The wet etching has isotropic etching. characteristics. [0003] However, the wet etching of the ITO layer is prone to ITO residues at the mask-covered position, resulting in uneven etching of the edges and burrs, which easily lead to the risk of chip leakage. In addition, the lateral etching of the wet etching of the ITO layer is serious, and the etching CD Bias (line width deviation, representing the difference between the line width after etching and the line width of the mask before etching...

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Application Information

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IPC IPC(8): H01L33/42H01L21/67
CPCH01L33/42H01L21/67069H01L2933/0016
Inventor 张彬彬苏财钰张涛苟先华林帅
Owner CHONGQING KONKA PHOTOELECTRIC TECH RES INST CO LTD