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Chip test circuit, test method and test device

A technology for chip testing and testing voltage, applied in the direction of measuring devices, measuring electricity, measuring electrical variables, etc., can solve the problems of high price, troubled employees, unstable supply, etc., and achieves the effect of high resolution and cost reduction.

Active Publication Date: 2022-01-11
绅克半导体科技(苏州)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, 24bit and above DACs are often expensive and the supply is unstable
How to achieve a higher precision (such as 24bit) resolution with a common specification DAC (such as 16bit) has long been a problem that has plagued practitioners

Method used

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  • Chip test circuit, test method and test device
  • Chip test circuit, test method and test device
  • Chip test circuit, test method and test device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0047] like figure 1 As shown, this embodiment discloses a chip test circuit for providing a test voltage to a chip under test, which includes:

[0048] The first digital-to-analog converter DAC1 is configured to obtain a first reference voltage and adjust the first output voltage Vout1 through a digital value;

[0049] The second digital-to-analog converter DAC2 is used to obtain a second reference voltage and adjust the second output voltage Vout2 through a digital value;

[0050] A voltage synthesis module 10, configured to add or subtract the first output voltage Vout1 and the second output voltage Vout2, and output a test voltage Vtest;

[0051] The calculation module is used to calculate the target digital value according to the target test voltage, and calculate the corresponding digital values ​​of the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 according to the target digital value, so that the chip test circuit The equival...

Embodiment 2

[0166] This embodiment discloses a chip testing method, which is applied to the chip testing circuit described in Embodiment 1, which includes the following steps:

[0167] S10. Calculate the corresponding digital values ​​of the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 according to the target digital value; specifically, calculate the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 using the calculation method in Embodiment 1 The digital value of the second digital-to-analog converter DAC2. I won't go into details here.

[0168] S20. Configure the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 with the calculated digital values ​​of the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2, so that the chip test circuit The equivalent digital value matches the target digital value.

[0169] Further, before calculating ...

Embodiment 3

[0172] This embodiment discloses a chip testing device for testing a chip, which is integrated with the chip testing circuit as described in the first embodiment, and provides a testing voltage through the chip testing circuit. Costs are effectively reduced by utilizing low-precision digital-to-analog converters to achieve high-precision resolution.

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Abstract

The invention relates to the technical field of chip testing, and discloses a chip testing circuit, comprising: a first digital-to-analog converter, used to obtain a first reference voltage, and adjust the first output voltage through a digital value; a second digital-to-analog converter, It is used to obtain the second reference voltage, and adjust the second output voltage through the digital value; the voltage synthesis module is used to add or subtract the first output voltage and the second output voltage, and output the test voltage; the calculation module is used to Calculate the target digital value according to the target test voltage, and calculate the corresponding digital value of the first digital-to-analog converter and the digital value of the second digital-to-analog converter according to the target digital value, so that the equivalent digital value of the chip test circuit is consistent with the target digital value matching; a configuration module, configured to configure the first digital-to-analog converter and the second digital-to-analog converter with the calculated digital value of the first digital-to-analog converter and the digital value of the second digital-to-analog converter. The present invention can utilize a low-resolution digital-to-analog converter to achieve high resolution.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a chip testing circuit, a testing method and a testing device. Background technique [0002] Chip testing machines generally require voltage and current measurement resources with high precision and resolution. When the internal circuit of the testing machine uses a DAC (digital-to-analog converter) to realize programmable output of voltage and current, the resolution of the output is determined by the digital bit width of the DAC. For example, if the design is implemented based on a 16bit DAC, the resolution is equivalent to dividing the range into 2 16 For example, if the range is 10V, the resolution is 0.15mV. In order to meet the application scenarios with higher measurement accuracy, it is usually necessary to use a DAC with a higher digital bit width. However, 24bit and above DACs are often expensive and the supply is not stable. How to achieve higher precision (su...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28
CPCG01R31/2851
Inventor 魏津胡雪原徐润生
Owner 绅克半导体科技(苏州)有限公司
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