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Wafer testing method, device, terminal equipment and storage medium

A technology for wafer testing and terminal equipment, applied in static memory, instruments, etc., to solve problems such as inconsistent number of chips

Active Publication Date: 2022-05-17
深圳米飞泰克科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The embodiment of the present application provides a wafer testing method, device, terminal equipment and storage medium, which can solve the problem that the number of defective chips recorded in the test file is inconsistent with the number of defective chips marked by dots on the wafer

Method used

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  • Wafer testing method, device, terminal equipment and storage medium
  • Wafer testing method, device, terminal equipment and storage medium
  • Wafer testing method, device, terminal equipment and storage medium

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Embodiment Construction

[0045] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

[0046] It should be understood that when used in this specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not exclude one or more other Presence or addition of features, wholes, steps, operations, elements, components and / or collections thereof.

[0047] In additi...

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Abstract

This application is applicable to the technical field of chip testing, and provides a wafer testing method, device, terminal equipment and storage medium. The above method is applied to the terminal equipment connected to the probe station, including: obtaining the test file of the wafer to be visually inspected The wafer to be visually inspected includes a plurality of chips, and the test file includes the first coordinates of the plurality of chips on the wafer to be visually inspected, and the test results of the plurality of chips; The corresponding relationship between the second coordinates and the first coordinates of multiple chips under visual inspection; the second coordinates of the defective chips sent by the receiving probe station according to the staff's point replenishment instruction; according to the second coordinates of the defective chips coordinates, and modify the test result of the defective chip in the test file to the test result of the defective chip. By adopting the above method, the number of defective chips recorded in the test file can be consistent with the number of defective chips marked by dots on the wafer.

Description

technical field [0001] The present application belongs to the technical field of chip testing, and in particular relates to a wafer testing method, device, terminal equipment and storage medium. Background technique [0002] Wafers are the basic material for manufacturing semiconductor chips, and a wafer usually includes multiple chips. Typically, after a wafer is produced, it needs to be electrically tested on a probe station. During the electrical test, chips that are defective products will be marked with dots. At the same time, during the dotting process, the probe station will also generate a test file (Wafer map), which can be used to record the two-dimensional coordinates and test results of each chip on the wafer. [0003] Since the electrical testing process can only test out chips with poor electrical properties, and for those chips with normal electrical properties but defective appearance (such as passivation layer defects, oxidation discoloration defects, etc....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/00G11C29/44
CPCG11C29/006G11C29/44G11C2029/4402
Inventor 王英广王健孔晓琳刘伟李安平
Owner 深圳米飞泰克科技股份有限公司