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Method and device for allocating fixed PCIE bus addresses according to slot positions

A bus address and address configuration technology, applied in the electronic field, can solve the problems of inconvenient programming and application of industrial control equipment, and achieve the effect of meeting design requirements

Pending Publication Date: 2022-01-04
XUJI GRP +2
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, some characteristics of the PCIE bus, such as device address allocation and device address addressing, are different from traditional industrial control equipment, which brings inconvenience to the programming and application of industrial control equipment.

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  • Method and device for allocating fixed PCIE bus addresses according to slot positions

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Embodiment Construction

[0030] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in combination with specific embodiments and with reference to the accompanying drawings. It should be understood that these descriptions are exemplary only, and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.

[0031] The first aspect of the present invention provides a kind of method that carries out fixed PCIE bus address allocation by slot position, this method has realized the allocation of fixed PCIE bus address by slot number for the device with PCIE backplane bus, each PCIE The PCIE bus address space allocated by the bus slot has nothing to do with the number of PCIE sub-node boards configured on the device, but is only r...

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Abstract

The invention discloses a method and device for allocating fixed PCIE bus addresses according to slot positions. The method comprises the following steps: allocating corresponding fixed PCIE addresses to each slot position of a PCIE bus backboard in advance; setting each slot position of the PCIE bus backboard and the port number of the PCIE bus switch to be in a one-to-one correspondence relationship; and when the PCIE child node board card is hooked in the slot position of the PCIE bus backboard and the PCIE main node board card is started or the PCIE child node board card is hooked again, enabling the PCIE main node board card to perform corresponding PCIE address configuration on the PCIE child node board card according to the slot position where the PCIE child node board card is located. According to the method and the device, through specific hardware and software design, the fixed PCIE bus address distribution of the PCIE daughter board according to the slot position is realized, the design requirements of most electric power system control protection devices and industrial control devices are met, and the popularization of the PCIE bus technology in the fields of industry, electric power and the like is facilitated.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to a method and a device for assigning fixed PCIE bus addresses according to slots. Background technique [0002] PCIE, short for baiperipheral component interconnect express, is a high-speed serial computer expansion bus standard. PCIE belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and the connected devices allocate exclusive channel bandwidth and do not share bus bandwidth. PCIE devices communicate through logical connections called interconnects or links. A link is a point-to-point communication channel between two PCI Express ports, allowing them to send and receive normal PCI requests and interrupts. [0003] With the development of industrial control equipment for high-speed data exchange and the maturity of PCIE bus technology, PCIE bus is introduced into the design of industrial control equipment as an ultra-high-speed...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42G06F13/10
CPCG06F13/4282G06F13/102
Inventor 曾丽丽张健杨亚璞于海李虎威王宏淼胡欢刘威鹏李二玉李跃鹏岳亚菲董春晨刘凯龙杨敏刘增超李哲王孟彬傅亚光吴述超
Owner XUJI GRP