Wafer preparation method

Abstract

The invention provides a wafer preparation method. The method comprises the following steps: S100, photoetching a bonding surface of a silicon substrate to form a plurality of accommodating grooves with preset angles and preset depths; S200, forming a first SiO2 layer on the bonding surface with the accommodating grooves; S300, embedding a SiC wafer into each accommodating groove, and bonding the SiC sheet with the first SiO2 layer; S400, filling the bonding surface bonded with the SiC wafer with a second SiO2 layer; and S500, polishing the filled second SiO2 layer until the SiC wafer is exposed and the surface is smooth. According to the wafer preparation method disclosed by the invention, the small-size SiC wafer and the silicon substrate can be structurally combined into a whole through permanent bonding, so that the equipment for processing the large-size (such as 12 inches) silicon wafer can process the small-size (such as 2-6 inches) SiC wafer embedded with the silicon substrate, and the universality of the existing equipment is improved, therefore, the production cost of the SiC device can be effectively reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a wafer preparation method. Background technique [0002] Silicon carbide (SiC) is a third-generation semiconductor material. Compared with the physical properties of silicon materials, the main characteristics of silicon carbide include: (1) The critical breakdown electric field strength is nearly 10 times that of silicon materials; (2) High thermal conductivity, More than 3 times that of silicon materials; (3) The saturated electron drift speed is high, which is twice that of silicon materials; (4) Good radiation resistance and chemical stability; (5) Like silicon materials, thermal oxidation process can be directly used in the A silicon dioxide insulating layer is grown on the surface. [0003] However, based on current process limitations, the size of SiC wafers is generally 2 inches to 6 inches, while the mainstream size of Si wafers is 12 inches. Although the proce...

AI Technical Summary

Problems solved by technology

Although the process of preparing SiC wafers overlaps with that of Si devices, due to the difference in wafer size, it is difficult for equipment that processes Si wafers to process small-sized SiC wafers.

For manufacturers with mature Si device preparation process and equipment, if they want to introduce the preparation of SiC devices, they will inevitably need to purchase production equipment suitable for 2-inch to 6-inch wafers, thereby increasing the cost of production and manufacturing

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