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Discrete Gaussian noise parallel generation method and hardware structure

A Gaussian noise and hardware structure technology, applied in random number generators, digital data processing components, instruments, etc., can solve the problem of unbalanced binary matrix traversal process, achieve parallelism and speed advantages, and reduce data storage capacity , the effect of improving performance

Pending Publication Date: 2022-01-28
NANJING UNIV
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Problems solved by technology

It is found through experiments that there is a serious imbalance problem in the traversal process of the binary matrix

Method used

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  • Discrete Gaussian noise parallel generation method and hardware structure
  • Discrete Gaussian noise parallel generation method and hardware structure
  • Discrete Gaussian noise parallel generation method and hardware structure

Examples

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Embodiment 1

[0054] This example discloses a parallel generation hardware structure of discrete Gaussian noise, such as figure 1 As shown, the hardware structure includes a true random number buffer, a random bit register, a bit search module, a result output processing module, a result buffer, and a control state machine.

[0055] The true random number buffer and the random bit register are electrically connected to each other, providing a random bit input for the algorithm; the bit search module is electrically connected to the random bit register, and the result output processing module is electrically connected to each other, performing a generating algorithm; the output processing The module is electrically connected to the results buffer for outputting the result; the control state machine is electrically connected to each other modules for the scheduling and data stream of the task.

[0056] like figure 1 As shown, the true random number buffer is a memory structure of the first in Fir...

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Abstract

The invention provides a discrete Gaussian noise parallel generation method and a hardware structure, and belongs to the field of cryptographic algorithm hardware design. The hardware structure comprises a true random number buffer area, a random bit register, a bit search module, a result output processing module, a control state machine and a result buffer area. The invention provides the discrete Gaussian noise generation method based on the Knuth-Yao algorithm and the hardware structure. The discrete Gaussian noise required in lattice cryptography can be generated. While the cryptographic security of noise distribution is ensured, the sampling time delay is reduced, the degree of parallelism is improved, the space complexity of searching is reduced, and the operation efficiency of the lattice cryptographic algorithm is improved.

Description

Technical field [0001] The present invention relates to cryptography hardware technologies, and in particular, to a discrete parallel Gaussian noise generating method and a hardware configuration. Background technique [0002] In modern cryptography, the ring error learning (Ring Learning With Errors, RLWE) is an important technical problem. Discrete Gaussian distribution (Discrete Gaussian Distribution) is an important part of the ring error learning problems. Ring error polynomial based learning problems space Y = A * s + e is solved. Wherein the polynomial e referred RLWE example, which conform to the coefficient of discrete Gaussian distribution. Therefore, rapid sampling discrete Gaussian noise in cryptography algorithm based RLWE hardware acceleration is very important. [0003] Because of the discrete Gaussian distribution characteristics on the integer field, it can not be directly generated. Usually uniformly distributed algorithm into a discrete Gaussian distribution. W...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/58G06F21/46
CPCG06F7/588G06F21/46
Inventor 傅玉祥沈思睿李丽宋文清王鑫宇何书专李伟
Owner NANJING UNIV