Single event error processing method, system and device
An error handling, single-particle technology, applied in error detection/correction, electrical digital data processing, generation of response errors, etc., can solve problems such as spacecraft damage, restrictions on the use of external SRAM, abnormal work of on-board computers, etc., and achieve cost low effect
Active Publication Date: 2022-05-17
ZHEJIANG GEELY HOLDING (GROUP) CO LTD +1
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[0004] However, when a single event error occurs in the external SRAM, the industrial-grade CPU or automotive-grade CPU in the onboard computer does not know it, especially when a single-event double error occurs in the external SRAM, the CPU will access wrong data, making the use of the external SRAM Restricted (only non-critical data can be stored), or when using external SRAM to store critical data, the onboard computer may work abnormally due to reading wrong data, and may even cause damage to the spacecraft
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[0057] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.
[0058] In a traditional onboard computer, the aerospace-grade CPU has a complete EDAC function and can be connected to an external SRAM with a width of 40 bits, of which 32 bits are used to store valid data, and the other 8 bits are used to store EDAC check codes. When a single event single error (also known as a single bit error) occurs in the external SRAM and the CPU reads the address...
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The present application provides a single event error processing method, system and device, which are applied to a computing system. The computing system includes a processor, a programmable device and at least one external SRAM with EDAC function. The processor is connected to the programmable device and the external SRAM respectively. The programmable device connects to the error indication pin on the external SRAM. The method includes: the programmable device samples the level value of the error indication pin, determines whether a single event error occurs in the external SRAM according to the level value of the error indication pin, and latches the error indication in response to a single event error occurring in the external SRAM. The level value of the pin, and send an interrupt signal to the processor; the processor responds to the interrupt signal, based on the level value of the latched error indication pin, and processes the single event error that occurs in the external SRAM. Therefore, the programmable device is used to realize the detection and processing of the single event error of the external SRAM by the processor.
Description
technical field [0001] The present application relates to on-board computer technology in the field of computer technology, in particular to a single event error processing method, system and device. Background technique [0002] Traditional on-board computers (also known as spacecraft computers) have high requirements for equipment reliability and are not very sensitive to cost, so expensive aerospace-grade central processing units (CPUs) are generally used. Aerospace-grade CPU comes with a relatively complete Error Detection And Correction (EDAC) function, which can be connected to an external Static Random-Access Memory (SRAM), and can handle external SRAM very well The occurrence of single event errors meets the requirements of space missions for on-board computers. [0003] With the continuous emergence of commercial aerospace companies, in view of the high price of aerospace-grade CPUs for traditional on-board computers, more and more commercial satellite on-board com...
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IPC IPC(8): G06F11/07
CPCG06F11/0727G06F11/0793
Inventor 邱家齐刘勇王洋田胜金程文倩李珩田
Owner ZHEJIANG GEELY HOLDING (GROUP) CO LTD