Chip system-level test method and device

Abstract

The invention provides a chip system-level test method, which comprises the following steps of: determining original compensation data required by a chip in a second predetermined environment relative to a first predetermined environment according to voltage frequency characteristic curves of the chip in the first predetermined environment and the second predetermined environment; determining a voltage compensation value in the chip according to the original compensation data and a target test frequency; and compensating the test voltage by using the voltage compensation value. According to the chip system-level test method and device provided by the invention, the chip can work on the same voltage frequency curve characteristic curve in the test environment and the use environment, and the coverage range of the test is improved.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a chip system-level testing method and device. Background technique [0002] With the improvement of semiconductor design complexity and manufacturing process, ultra-high integration, ultra-high performance and ultra-high power consumption chips are becoming more and more mainstream, and the hardware design of chip application and testing is becoming more and more complex. Level Test (SLT for short) requirements and quality also bring huge challenges. [0003] At present, the system test SLT adopts a general-purpose hardware motherboard design, and generally uses a socket (referred to as socket) design to connect the chip and the motherboard. The test is performed according to the characteristic curve law of each chip and the voltage and frequency defined by the design specification. On the customer platform, a customized motherboard design is adopted according to actual ne...

AI Technical Summary

Problems solved by technology

[0005] Different connection methods between the chip and the motherboard or different hardware designs such as the test motherboard will cause the chip to exhibit differences in characteristic parameters such as voltage or frequency under the same load conditions. These differences will become blind spots in the test, resulting in insufficient test coverage.

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