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Sound recognition system and method based on FPGA platform

A sound recognition and platform technology, applied in speech recognition, speech analysis, instruments, etc., can solve the problems of complex detection of ambient sound, and achieve the effect of increasing the available range, saving equipment costs, and reducing energy consumption

Pending Publication Date: 2022-04-12
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the above-mentioned deficiencies in the prior art, a sound recognition system and method based on FPGA platform provided by the present invention solves the problem of complicated process of detecting environmental sound

Method used

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  • Sound recognition system and method based on FPGA platform
  • Sound recognition system and method based on FPGA platform
  • Sound recognition system and method based on FPGA platform

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] Such as figure 1 Shown, in one embodiment of the present invention, a kind of sound recognition system based on FPGA platform comprises interconnected FPGA development board and sound input module;

[0044] Wherein, the FPGA development board includes sound input preprocessing module, sound MFSC extraction module, CNN recognition module, DMA (direct memory access) module, DDR3, DDR Ctrl, data cache deployment control module, ping-pong RAM, MFSC RAM, CNN input RAM and CNN output RAM; the DMA module also includes a first central direct memory submodule (CDMA_0), a second central direct memory submodule (CDMA_1), a third central direct memory submodule (CDMA_2) and a fourth central direct memory submodule module(CDMA_3);

[0045] Described sound input module is connected with described data cache control module through described sound input preprocessing module, ping-pong RAM, sound MFSC extraction module and MFSC RAM successively; Described data cache control module is a...

Embodiment 2

[0055] This embodiment is aimed at the specific structure of the sound input preprocessing module, such as figure 2 As shown, the sound input preprocessing module includes a CTRL submodule, an ADC_READ submodule and a FIR submodule, wherein the CTRL submodule is connected to the ADC_READ submodule and the FIR submodule respectively, and the ADC_READ submodule is also connected to the FIR submodule The FIR sub-module is connected; the FIR sub-module is also connected with the ping-pong RAM.

[0056] The CTRL submodule includes IIC_CTRL, FIR_CTRL and RAM_CTRL connected in sequence, the RAM_CTRL is also connected to the ping-pong RAM, the FIR_CTRL is also connected to the FIR submodule, and the IIC_CTRL is also connected to the sound input module.

[0057] The CTRL (internal control) sub-module includes IIC_CTRL, FIR_CTRL and RAM_CTRL, among which IIC_CTRL is used for the configuration of the WM8731 chip, and is also used to notify the ADC_READ sub-module to receive the data of ...

Embodiment 3

[0061] The present embodiment is aimed at the concrete structure of sound MFSC extraction module, as image 3 Shown, described sound MFSC extraction module comprises the sound MFSC extraction module state machine that connects successively, add window submodule (add_win), Fourier leaf module (fft), amplitude calculation submodule (abs_calc), Mel filter submodule ( mel_fil), natural logarithm calculation submodule (ln_calc) and the first filling submodule (log_mel_pad); the sound MFSC extraction module state machine is also connected with the ping-pong RAM, and the first filling submodule is also connected with the MFSC RAM connection;

[0062] The first filling sub-module is used to fill the output MFSC data. The MFSC data can be regarded as a feature map. The filling method is to fill 1 row or 1 column of 0 data around the feature map to meet the requirements of the CNN recognition module. Input data requirements.

[0063] The Mel filtering sub-module includes a Mel filter ...

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Abstract

The invention discloses a sound recognition system and method based on an FPGA platform. The system comprises an FPGA development board and a sound input module which are connected with each other. Wherein the FPGA development board comprises a sound input preprocessing module, a sound MFSC extraction module, a CNN recognition module, a DMA module, a DDR3, a DDR Ctrl, a data cache deployment and control module, a ping-pong RAM, an MFSC RAM, a CNN input RAM and a CNN output RAM; the sound input module is connected with the data cache deployment and control module through the sound input preprocessing module, the ping-pong RAM, the sound MFSC extraction module and the MFSC RAM in sequence; the data cache deployment and control module is further connected with the DMA module, the CNN input RAM and the CNN output RAM, the CNN recognition module is connected with the DMA module, the CNN input RAM and the CNN output RAM, and the DMA module is further connected with the DDR Ctrl and the DDR3.

Description

technical field [0001] The invention belongs to the technical field of voice recognition, and in particular relates to a voice recognition system and method based on an FPGA platform. Background technique [0002] Sound signals are ubiquitous in people's lives. As one of the most common signals, sound signals are a source of information that allow humans to build awareness of the external world. Field Programmable Gate Array (FPGA) is chosen as the platform for algorithm implementation, and the FPGA implementation of sound feature extraction and recognition algorithm is studied. [0003] The sound recognition system based on the FPGA platform can be incorporated into the intelligent Internet of Things early warning system, and can work independently for real-time detection of environmental sounds to prevent emergencies; it can also be used in combination with the video monitoring system, and the video monitoring system is under poor operating conditions. When the light is ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G10L15/02G10L15/08G10L19/26G10L25/24G10L25/27
Inventor 肖卓凌王智张新辰付宇飞
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA