Array substrate, manufacturing method and display device
A technology of an array substrate and a manufacturing method, applied in the field of display devices, can solve problems such as affecting product yield and the like
Pending Publication Date: 2022-04-19
BOE TECH GRP CO LTD
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Problems solved by technology
[0003] However, low-temperature polysilicon is formed by irradiating amorphous silicon (a-Si) with laser light using Excimer Laser Annealing (ELA) equipment. Laser energy achieves effective crystallization and affects product yield
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[0052] figure 1 A schematic structural diagram of an array substrate provided for related technologies, such as figure 1 As shown, the array substrate includes a base substrate 1 on which a first thin film transistor 100 and a second thin film transistor 200 are disposed. Define the direction away from the base substrate 1 and perpendicular to the base substrate 1 as the first direction X, the first thin film transistor 100 and the second thin film transistor 200 are stacked in the first direction, and the second thin film transistor 200 is opposite to the first thin film transistor 200 The transistor 100 is away from the base substrate 1 .
[0053] The first thin film transistor 100 includes a first active layer, a first gate G1, a first source S1, and a first drain D1, and the second thin film transistor 200 includes a second active layer, a first gate G2, a second source S2 and the second drain D2.
[0054] exist figure 1 In the array substrate shown, on one side of the...
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The embodiment of the invention provides an array substrate, a manufacturing method and a display device, the array substrate comprises a first area and a second area which are adjacent to each other, and in the first area, a first low-temperature polycrystalline silicon layer, a middle film layer and a second low-temperature polycrystalline silicon layer are stacked along a first direction; a supporting column is arranged between the first low-temperature polycrystalline silicon layer and the substrate in the second area, the part, jacked up by the supporting column, of the first low-temperature polycrystalline silicon layer comprises a first connecting part, and the second low-temperature polycrystalline silicon layer comprises a second connecting part which is located in the second area and connected with the first connecting part; the extending distance of the second connecting part in the first direction is smaller than the distance between the first low-temperature polycrystalline silicon layer and the second low-temperature polycrystalline silicon layer in the first area. According to the design, the depth of the via hole can be reduced, even direct connection after the via hole is omitted, so that in the manufacturing process of the second low-temperature polycrystalline silicon layer, more laser energy is absorbed when ELA equipment performs laser irradiation, and the crystallization quality is improved; and the normal resistance is ensured after the conductor is formed, and the product yield is improved.
Description
technical field [0001] The embodiments of the present application relate to the technical field of display devices, and in particular, to an array substrate, a manufacturing method, and a display device. Background technique [0002] In the low temperature polysilicon (Low Temperature Poly-Silicon, abbreviated as LTPS) array substrate, there may be two thin film transistors (Thin Film Transistor, abbreviated as TFT) stacked on top of each other, the two stacked thin film transistors can choose two The low-temperature polysilicon layer in the thin film transistor is overlapped through holes, and then the low-temperature polysilicon layer at the overlapped point is conductorized to realize the connection of the drain end. [0003] However, low-temperature polysilicon is formed by irradiating amorphous silicon (a-Si) with laser light using Excimer Laser Annealing (ELA) equipment. Laser energy achieves effective crystallization and affects product yield. Contents of the inven...
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IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/1222H01L27/1285
Inventor 杜建华赵梦王超璐吴昊吕杨关峰赵磊
Owner BOE TECH GRP CO LTD