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Integrated circuit component and manufacturing method thereof

A technology for integrated circuits and manufacturing methods, applied in circuits, electrical components, electrical solid-state devices, etc., can solve the problems of small wafer edge thickness, difficulty in focusing, and reduced bonding strength, and achieve the effect of improving yield and reliability.

Pending Publication Date: 2022-05-13
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the thinning process of the chemical mechanical polishing process, the thickness of the wafer edge is smaller than that of the center, which not only leads to a decrease in bonding strength at the edge, but also makes it difficult to focus due to the unevenness of the wafer surface

Method used

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  • Integrated circuit component and manufacturing method thereof
  • Integrated circuit component and manufacturing method thereof
  • Integrated circuit component and manufacturing method thereof

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Embodiment Construction

[0031] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of clarity, the integrated circuit assembly obtained after several steps can be depicted in one figure.

[0032] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0033] If it is to describe the situation directly on another layer or an...

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PUM

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Abstract

The invention discloses an integrated circuit component and a manufacturing method thereof. The manufacturing method comprises the steps that a plurality of wafers are bonded, the plurality of wafers at least comprise a first wafer and a second wafer, and the edge part of the second wafer is trimmed to form a step; filling the step to form a supporting layer; the first surface of the second wafer is subjected to chemical mechanical polishing to obtain a flat surface, and the first surface of the second wafer is far away from the first wafer. According to the integrated circuit assembly, the edge part of the second wafer is removed through trimming, and the supporting layer is adopted to provide protection so as to avoid the serious problem that the edge thickness is smaller than the center thickness during the chemical mechanical polishing process, so that a flat surface can be obtained, accurate focusing can be realized in the photoetching process, and the yield is improved. Therefore, the yield and the reliability of the integrated circuit assembly are improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and more specifically relates to an integrated circuit component and a manufacturing method thereof. Background technique [0002] As chip manufacturing technology has advanced, stacked integrated circuit assemblies have been developed. Various circuit units are formed on multiple wafers, and then the multiple wafers are bonded together and interconnected via conductive vias to form an integrated circuit assembly. The use of stacked integrated circuit components can reduce chip footprint, reduce parasitic effects, improve response speed, reduce power consumption, and support heterogeneous integration. [0003] However, the stacked wafers in the IC assembly may cause subsequent processing difficulties. For example, after a plurality of wafers are bonded to form an integrated circuit assembly, the surface of at least one wafer is thinned and photolithographically formed to form wires or pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02H01L21/98H01L25/18H01L27/11575H01L27/11582H10B43/27H10B43/50
CPCH01L21/02021H01L21/02013H01L25/50H01L25/18H10B43/50H10B43/27
Inventor 乔龙云李漾
Owner YANGTZE MEMORY TECH CO LTD