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Apparatus and method for processing memory load requests

A memory system and data processing technology, applied in the field of data processing

Pending Publication Date: 2022-06-07
ARM LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some cases, other operations on the device may require the results of the load request to proceed

Method used

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  • Apparatus and method for processing memory load requests
  • Apparatus and method for processing memory load requests
  • Apparatus and method for processing memory load requests

Examples

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Embodiment Construction

[0038] In an apparatus for performing data processing operations, where at least some of those data processing operations involve accessing data items in a memory system, it may be desirable to provide a mechanism by which multiple access requests can be efficiently handled . For example, since it is common for other operations to depend on the result of a load request, by providing an efficient means of handling load requests, this may reduce the occurrence of delays or stalls that occur in a device while the device is waiting for the result of a load request from the memory system Rate.

[0039] As used herein, the term memory system refers to main memory other than any intermediate cache hierarchy that may be implemented to store cached copies of data items in main memory.

[0040] The apparatus may generate a load request with an indication of the data item to be retrieved. The indication is usually the memory address of the data item, directly indicating the memory loca...

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PUM

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Abstract

The invention discloses a data processing device and method. When load requests are generated to support data processing operations, the load requests are buffered in pending load buffer circuitry prior to execution. The coalescence circuit determines, for a first load request, whether a set of one or more subsequent load requests buffered in the pending load buffer circuit satisfies an address proximity condition. The address proximity condition is satisfied when all data items identified by the set of one or more subsequent load requests are included within a series of data items to be retrieved from the memory system in response to the first load request. Forwarding of the set of one or more subsequent load requests is suppressed when the address proximity condition is satisfied. Upon receiving the series of data items retrieved by the load processing circuitry, the decoalescence circuitry returns the data item identified by the load request, and when the address proximity condition is satisfied, one or more further data items for the one or more subsequent load requests are returned.

Description

Background technique [0001] The present technology relates to the field of data processing. More specifically, the present invention relates to the handling of access requests. [0002] The apparatus may perform data processing operations using data stored in the memory system. In order to access a data item in the memory system, the data processing circuitry of the apparatus is arranged to generate an access request indicating the data item to be accessed. For example, these access requests may be load requests. In some cases, other operations of the device may require the results of the load request to proceed. Therefore, it is desirable to be able to process load requests quickly to reduce the amount of time a device waits for a data item to be retrieved. This is a particular concern in the context of load operations, as a write operation may be able to send a write request to the memory system and proceed without waiting for the store operation to fully complete. Simi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F9/30
CPCG06F9/30043G06F9/3853G06F9/3834G06F9/30181G06F9/3824G06F9/38585G06F3/0613G06F3/0629G06F3/0673
Inventor 姆布·埃约勒斯特凡诺斯·卡西拉斯
Owner ARM LTD
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