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Magnetic memory chip, module and system-in-package chip for approximate calculation

A system-in-package, magnetic storage technology, applied in the field of memory, can solve the problem of high data fault tolerance, and achieve the effect of improving computing speed, reducing computing power consumption and cost

Active Publication Date: 2022-07-29
波平方科技(杭州)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] With the rapid development of cloud computing, artificial intelligence, Internet, mobile terminals and other technologies in recent years, new computing application scenarios are emerging, such as computer vision, image / multimedia processing, artificial intelligence, big data mining, etc., and these application scenarios are often High error tolerance rate for data

Method used

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  • Magnetic memory chip, module and system-in-package chip for approximate calculation
  • Magnetic memory chip, module and system-in-package chip for approximate calculation
  • Magnetic memory chip, module and system-in-package chip for approximate calculation

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0061] As shown in FIG. 2( a ), the memory cell 30 of the magnetic memory chip for approximate calculation in this embodiment includes a magnetic tunnel junction 10 and an access transistor 20 . The magnetic tunnel junction 10 includes a magnetic pinned layer 101 , a magnetic free layer 103 and a tunneling barrier layer 102 insulating between them. The magnetic tunnel junction 10 is connected to the access transistor 20 , and the access and read / write to the magnetic tunnel junction 10 are controlled by controlling the switch of the access transistor 20 .

[0062] As shown in FIG. 2( b ), several memory cells 30 are arranged in several rows and several columns, and are connected to each other through bit lines 40 and word lines 50 to form a memory array 601 . The word line 50 controls the switching of the access transistor 20 in the memory cell 30 , and the bit line 40 is connected to the magnetic tunnel junction 10 in the memory cell 30 . The memory cell 30 located at the in...

Embodiment 2

[0074] One of the implementation methods of the magnetic memory chip used for approximate calculation in the present invention, the main technical solution of this embodiment is similar to that of Embodiment 1, and the features not explained in this embodiment are explained in Embodiment 1. No further description is given here. The main technical features of this embodiment are:

[0075] Each memory block 60 in the magnetic random access memory chip 70 is configured with an independent read circuit 602, and the read circuit 602 provides a read current to measure the resistance of the magnetic tunnel junction 10 in the memory block 60, so as to read out the resistance of the magnetic tunnel junction 10. stored data. In this embodiment, the read current amplitude and / or pulse width of each memory block 60 is independently set based on a preset application scenario, so that different memory blocks 60 have different read error code rates. For example, for the memory block 60 sto...

Embodiment 3

[0082] One of the implementation methods of the magnetic memory chip for approximate calculation in the present invention, the main technical scheme of this embodiment is similar to that of Embodiment 1 or 2, and the features not explained in this embodiment are adopted in Embodiment 1 or 2 The explanations in , will not be repeated here. The main technical features of this embodiment are:

[0083] The write threshold current of the magnetic tunnel junction 10 is related to the switching energy barrier of its magnetic free layer 103 . When the anisotropy of the magnetic free layer 103 is kept constant, the magnetic free layer 103 with a smaller volume has a smaller switching energy barrier, and the corresponding write current threshold is also smaller. On the other hand, if the switching energy barrier of the magnetic free layer 103 is small, the data retention capability of the magnetic free layer 103 will be reduced, and the stored data may be changed with a certain probabi...

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Abstract

The invention relates to the technical field of memories, and discloses a magnetic memory chip for approximate calculation, a module and a system-in-package chip. The magnetic storage chip comprises a plurality of storage blocks, and each storage block comprises a storage array, a reading circuit, a writing circuit and / or an address decoding circuit. The magnetic storage module or the system-in-package chip comprises a plurality of magnetic storage chips, a control circuit and a module data interface circuit. A writing circuit and / or a reading circuit configured for each storage block in the magnetic storage chip are mutually independent, and each writing circuit and / or reading circuit independently sets current amplitude and / or pulse width based on a preset application scene, so that different storage blocks have different error code rates. The calculation power consumption and cost of the system are reduced without influencing the approximate calculation result, and the calculation speed is improved.

Description

technical field [0001] The present invention relates to the technical field of memory, in particular to a magnetic memory chip, a module and a system-in-package chip for approximate computing. Background technique [0002] Integrated circuit products usually include a processor and a memory, the data is calculated in the processor, and the calculation results are stored in the memory. When an integrated circuit product works, data is transferred back and forth between the processor and the memory. In the development process of integrated circuits, the development of memory technology lags behind the development of processor technology, which leads to the performance of memory becoming the bottleneck of computing, which limits the improvement of overall product performance. This memory bottleneck that seriously hinders the performance of the processor is named "Memory Wall". In order to solve the problem of the memory wall, a memory with high speed, large capacity and excel...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/06G11C11/16H01L25/18
CPCG11C5/063G11C11/161G11C11/1675G11C11/1673H01L25/18
Inventor 蒋信刘瑞盛喻涛简红
Owner 波平方科技(杭州)有限公司