Pixel array layout method and metal wire structure for focal plane read-out circuit
A technology of pixel array and readout circuit, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of complex wiring, asymmetry between odd-row pixels and even-row pixels, etc., to achieve simple wiring and high area utilization. Effect
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[0031] The size of each pixel is 30μ×30μ, and the pixel includes an integral control transistor Mint, a row selection switch Msw, a detection tube Mtest and a capacitor Mc realized by using a MOS tube. Among them, the size of Mint, Msw, and Mtest is not large, and in order to improve the charge storage capacity, the larger the better, the Mc will occupy about 2 / 3 of the pixel area.
[0032] Due to the special structure, there is no need to use high-level Vdd in the pixel array, so the input signals of the pixels are: detection signal Test, row selection control Rs(i), integral control Ckint and ground line Gnd. Among them, Rs(i) controls all pixels in a row, and Test, Ckint, and Gnd control all pixels in the pixel array.
[0033] like figure 2 As shown, for a design module containing 4×4 pixel units, the pixels are Pixel(4n+1, 4m+1), Pixel(4n+1, 4m+2), Pixel(4n+1, 4m+ 3), Pixel(4n+1, 4m+4), Pixel(4n+3, 4m+1), Pixel(4n+3, 4m+2), Pixel(4n+3, 4m+3), Pixel(4n +3, 4m+4), Pixel(4...
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