Signal jitter preventor

Abstract

A device for preventing signal jitter contains a level transducer circuit corresponding to a control signal to decide if the internal signal of a first chip has the level transition and outputs a transition signals; and a level restitation circuit electrically connected with the said level transducer circuit used for inputting the said transition output signal and corresponding to a restitution control signal for determining if the said transition output signal restitutes to the said internal signal providing and provides for the use by a second chip. By using the said device for preventing signal jetter, the cost can be lowered and it possesses the elastic mode to achieve the prevention of the said first chip from generating power bounce or ground-bounce.

Description

technical field [0001] The invention relates to a signal bounce prevention device, especially a signal bounce prevention device capable of preventing a chip from generating power bounce or ground bounce. Background technique [0002] As far as the current chip (chip) design is concerned, although more and more functions are integrated into the chip, in order to reduce the size of the chip, the number of pins tends to be more and more streamlined. Therefore, it is provided for the chip to use Power pins and ground pins are often one of the objects of streamlining. It is possible to reduce the number or line width of power pins and ground pins. In addition, reducing the distance between chip pins is also one of the common methods to reduce chip size. [0003] As a result, the chip is prone to power bounce or ground bounce; that is, due to insufficient power pins or line width, when there are too many output signals in the multiple output components of the chip When the power...

AI Technical Summary

Problems solved by technology

[0010] From the above pair figure 2 It should be known from the description of the actions that adding resistors and diodes to reduce the number of pins that are both high-level drive or low-level drive pins is feasible, but it lacks design flexibility, and once The above-mentioned power jumping or ground jumping phenomenon occurs when the circuit of the chip C is about to be tested or the design has been completed. In order to temporarily add these resistors and diodes, it is obviously necessary to re-plan (layout) the entire chip circuit. This is a common practice would appear to be very cost-effective and inconvenient

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