Display panel, driving method thereof and display device

Abstract

The invention discloses a display panel, a driving method thereof and a display device, and belongs to the technical field of display. A sub-pixel of the display panel comprises a pixel circuit and a light-emitting element; the pixel circuit at least comprises a driving transistor, a data write-in module, a threshold compensation module and a bias adjustment module. The data write-in module is used for providing a data signal for the driving transistor, the bias adjustment module is used for adjusting the bias state of the driving transistor through a bias adjustment signal, and the threshold compensation module is used for detecting and compensating the deviation of the threshold voltage of the driving transistor; a first power signal connected with the first electrode of the driving transistor is a fixed value, a second power signal connected with the second electrode of the driving transistor is a change value, and a bias adjusting signal is a change value. The driving method is applied to the display panel. The display device comprises the display panel. According to the invention, the problem of poor display effect caused by threshold drift after the driving transistor works for a long time can be improved, and the power consumption of the panel can be reduced.

Description

[0001] This application is a divisional application with the application date of November 21, 2022, application number 202211456256.4, and invention name “Display panel, driving method thereof, and display device”. Technical Field

[0002] The present invention relates to the field of display technology, and more specifically, to a display panel and a driving method thereof, and a display device. Background Art

[0003] Organic Light Emitting Diode (OLED) has the characteristics of self-luminescence, fast response, wide color gamut, large viewing angle, high brightness, etc. It can be used to make thin display devices and flexible display devices, and has gradually become the focus of research in the current display technology field. Organic light emitting diodes require current drive. When used in the display field, the driving transistor in the pixel circuit is controlled to provide a driving current to the organic light emitting diode so that the organic light emitting diode emits light. In addition, a stable driving current needs to be provided to the organic light emitting diode to ensure the display performance in the application.

[0004] In the prior art, the driving transistor of the pixel circuit may have a threshold voltage drift problem after long-term operation, which affects the display effect. In addition, the existing display panel has high power consumption during display, which limits the further application of the display panel.

[0005] Therefore, it is a technical problem that needs to be urgently solved by those skilled in the art to provide a display panel and a driving method and a display device that can not only improve the problem of poor display effect caused by threshold drift after long-term operation of the driving transistor, but also reduce the power consumption of the panel. Summary of the invention

[0006] In view of this, the present invention provides a display panel and a driving method thereof, and a display device to solve the problem that the threshold voltage of the driving transistor in the display panel of the prior art may drift after long-term operation, thereby affecting the display effect, and the power consumption is high during display.

[0007] The present invention discloses a display panel, comprising: a plurality of sub-pixels, wherein the sub-pixels comprise an electrically connected pixel circuit and a light-emitting element; the pixel circuit comprises at least a driving transistor, a data writing module, a threshold compensation module and a bias adjustment module; the first pole of the driving transistor is electrically connected to the data writing module and the bias adjustment module respectively, and the driving transistor is used to generate a driving current; the first end of the data writing module is electrically connected to a data signal, the second end of the data writing module is electrically connected to the first pole of the driving transistor, and the data writing module is used to provide a data signal to the driving transistor; the first end of the bias adjustment module is electrically connected to the bias adjustment signal, the second end of the bias adjustment module is electrically connected to the first pole of the driving transistor, and the bias adjustment module is used to provide the bias adjustment signal to the first pole of the driving transistor to adjust the bias state of the driving transistor; the threshold compensation module is connected between the gate of the driving transistor and the second pole of the driving transistor, and the threshold compensation module is used to detect and compensate for the deviation of the threshold voltage of the driving transistor; the first pole of the driving transistor is connected to a first power supply signal, and the second pole of the driving transistor is connected to a second power supply signal; the first power supply signal is a fixed value, the second power supply signal is a variable value, and the bias adjustment signal is a variable value.

[0008] Based on the same inventive concept, the present invention also discloses a driving method for a display panel, which is applied to the above-mentioned display panel; the driving method at least includes: a first bias adjustment stage, a threshold compensation and data writing stage, and a light-emitting stage, and the first bias adjustment stage is executed before the threshold compensation and data writing stage; in the first bias adjustment stage, the bias adjustment module is turned on, and the bias adjustment signal is provided to the first electrode of the driving transistor to adjust the bias state of the driving transistor; in the threshold compensation and data writing stage, the threshold compensation module detects and compensates for the deviation of the threshold voltage of the driving transistor, and the data writing module writes the compensated threshold voltage deviation together with the data signal into the driving transistor; in the light-emitting stage, the driving transistor generates a driving current to drive the light-emitting element to emit light; the driving method also includes a power supply adjustment stage; in the power supply adjustment stage, the value of the second power supply signal is adjusted according to the change of the display brightness of the display panel, and the value of the bias adjustment signal is adjusted according to the change of the value of the second power supply signal.

[0009] Based on the same inventive concept, the present invention also discloses a display device, which includes the above-mentioned display panel.

[0010] Compared with the prior art, the display panel and its driving method and display device provided by the present invention achieve at least the following beneficial effects:

[0011] The sub-pixel of the display panel provided by the present invention may include an electrically connected pixel circuit and a light-emitting element, and the pixel circuit is used to control the light-emitting element to emit light. The pixel circuit at least includes a driving transistor and a data writing module, a threshold compensation module and a bias adjustment module, the data writing module is used to provide a data signal to the driving transistor, and the threshold compensation module is used to detect and compensate for the deviation of the threshold voltage of the driving transistor, and the deviation of the compensated threshold voltage and the data signal provided by the data line itself are jointly provided to the driving transistor to achieve threshold compensation for the driving transistor, which can improve the display unevenness caused by the threshold voltage difference of the driving transistor caused by the manufacturing process and the threshold voltage drift of the driving transistor caused by transistor aging. The bias adjustment module is used to provide a bias adjustment signal to the driving transistor, adjust the bias state of the driving transistor, improve the threshold drift problem of the driving transistor, and enhance the display effect. The first pole of the driving transistor of the present invention is connected to the first power supply signal, and the second pole of the driving transistor is connected to the second power supply signal. When the pixel circuit drives the light-emitting element electrically connected to it to emit light, the conductive path between the first power supply signal, the driving transistor, the light-emitting element, and the second power supply signal can be used to make the driving transistor generate a driving current that drives the light-emitting element to emit light, thereby achieving the light-emitting effect of the light-emitting element. The present invention sets the first power signal connected to the first electrode of the driving transistor in the pixel circuit to be a fixed value, and the second power signal connected to the second electrode of the driving transistor to be a variable value, and the voltage value of the second power signal can change with the brightness required by the display panel, which is beneficial to saving the power consumption of the entire panel. When the display panel adopts a dynamically changing second power signal to reduce the panel power consumption according to the demand for luminous display brightness, the bias adjustment signal connected to the bias adjustment module also changes dynamically with it, which can avoid the deviation of the luminous brightness of the light-emitting element from the original required brightness due to the change of the second power signal, thereby helping to improve the display quality of the display panel.

[0012] Of course, any product implementing the present invention does not necessarily need to achieve all of the above-mentioned technical effects at the same time.

[0013] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0015] Figure 1 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present invention;

[0016] Figure 2 yes Figure 1Schematic diagram of the circuit connection structure of the neutron pixel;

[0017] Figure 3 yes Figure 1 A schematic diagram of another circuit connection structure of a neutron pixel;

[0018] Figure 4 yes Figure 3 A comparison diagram of the changing trend of the effective level of the first scanning signal in FIG.

[0019] Figure 5 yes Figure 1 A schematic diagram of another circuit connection structure of a neutron pixel;

[0020] Figure 6 yes Figure 1 A schematic diagram of another circuit connection structure of a neutron pixel;

[0021] Figure 7 yes Figure 6 The working timing diagram of the pixel circuit in the figure;

[0022] Figure 8 yes Figure 1 A schematic diagram of another circuit connection structure of a neutron pixel;

[0023] Fig. 9 yes Figure 1 A schematic diagram of another circuit connection structure of a neutron pixel;

[0024] Fig.10 yes Fig. 9 The working timing diagram of the pixel circuit in the figure;

[0025] Fig.11 is a flowchart of a driving method provided by an embodiment of the present invention;

[0026] Fig.12 yes Figure 6 Another working timing diagram of the pixel circuit;

[0027] Fig.13 yes Figure 6 Another working timing diagram of the pixel circuit;

[0028] Fig.14 It is a schematic diagram of the planar structure of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.

[0030] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0031] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0032] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0033] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0034] Please refer to Figure 1 and Figure 2 , Figure 1 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present invention, Figure 2 yes Figure 1 A schematic diagram of a circuit connection structure of a sub-pixel, a display panel 000 provided in this embodiment, comprises: a plurality of sub-pixels 00, wherein the sub-pixel 00 comprises a pixel circuit 10 and a light-emitting element 20 which are electrically connected;

[0035] The pixel circuit 10 at least includes a driving transistor DT, a data writing module 101, a threshold compensation module 102 and a bias adjustment module 103;

[0036] The first electrode of the driving transistor DT is electrically connected to the data writing module 101 and the bias adjustment module 103 respectively, and the driving transistor DT is used to generate a driving current;

[0037] A first terminal of the data writing module 101 is electrically connected to the data signal Vdata, a second terminal of the data writing module 101 is electrically connected to a first electrode of the driving transistor DT, and the data writing module 101 is used to provide the data signal Vdata to the driving transistor DT;

[0038] A first end of the bias adjustment module 103 is electrically connected to the bias adjustment signal Vbias, a second end of the bias adjustment module 103 is electrically connected to the first electrode of the driving transistor DT, and the bias adjustment module 103 is used to provide the bias adjustment signal Vbias to the first electrode of the driving transistor DT to adjust the bias state of the driving transistor DT;

[0039] The threshold compensation module 102 is connected between the gate of the driving transistor DT and the second electrode of the driving transistor DT, and the threshold compensation module 102 is used to detect and compensate for the deviation of the threshold voltage of the driving transistor DT;

[0040] The first electrode of the driving transistor DT is connected to the first power signal Vpvdd, and the second electrode of the driving transistor DT is connected to the second power signal Vpvee; the first power signal Vpvdd is a fixed value, the second power signal Vpvee is a variable value, and the bias adjustment signal Vbias is a variable value.

[0041] Specifically, the display panel 000 provided in this embodiment may be an organic light emitting display panel, or may be other display panels that control the driving transistor DT in the pixel circuit 10 to provide a driving current so that the light emitting element 20 emits light. The light emitting element 20 in this embodiment may be an organic light emitting diode, or in some other optional embodiments, the light emitting element 20 may also be a micro light emitting diode or a sub-millimeter light emitting diode. This embodiment is not limited to this. This embodiment takes the display panel 000 as an organic light emitting diode display panel as an example for illustration. The display panel 000 in this embodiment includes a plurality of sub-pixels 00. Optionally, the plurality of sub-pixels 00 in this embodiment may be arranged in an array, that is, the plurality of sub-pixels 00 are arranged along a first direction X to form a sub-pixel row, the plurality of sub-pixel rows are arranged along a second direction Y, the plurality of sub-pixels 00 are arranged along the second direction Y to form a sub-pixel column, and the plurality of sub-pixel columns are arranged along the first direction X to form an array-arranged sub-pixel 00 structure; wherein the first direction X and the second direction Y may be understood as intersecting or being perpendicular to each other in a direction parallel to the plane where the display panel 000 is located. Or in some other optional embodiments, the plurality of sub-pixels 00 may also be arranged in other ways, which is not limited in this embodiment. Figure 1The arrangement of multiple sub-pixels 00 in an array is used as an example for illustration. The sub-pixel 00 may include an electrically connected pixel circuit 10 and a light-emitting element 20, and the pixel circuit 10 is used to control the light-emitting element 20 to emit light. Since the light-emitting element 20 in the organic light-emitting diode display panel can generally be an organic light-emitting diode, which is a current-driven element, it is necessary to set a corresponding pixel circuit 10 to provide a driving current for the light-emitting element 20 so that the light-emitting element 20 can emit light. The pixel circuit 10 of this embodiment at least includes a driving transistor DT and a data writing module 101, a threshold compensation module 102 and a bias adjustment module 103, and the first electrode of the driving transistor DT is electrically connected to the data writing module 101 and the bias adjustment module 103 respectively, and the driving transistor DT is used to generate a driving current, wherein the first electrode of the driving transistor DT can be understood as the source of the driving transistor DT, and the second electrode of the driving transistor DT can be understood as the drain of the driving transistor DT, or the first electrode of the driving transistor DT can be understood as the drain of the driving transistor DT, and the second electrode of the driving transistor DT can be understood as the source of the driving transistor DT, and this embodiment is not limited to this. The first end of the data writing module 101 is electrically connected to the data signal Vdata. Optionally, the first end of the data writing module 101 can be connected to the data line S in the display panel 000, and the data signal Vdata is transmitted to the first end of the data writing module 101 through the data line S. The second end of the data writing module 101 is electrically connected to the first electrode of the driving transistor DT. The data writing module 101 is used to provide the data signal Vdata to the driving transistor DT. The threshold compensation module 102 is connected between the gate of the driving transistor DT and the second electrode of the driving transistor DT. The threshold compensation module 102 is used to detect and compensate for the deviation of the threshold voltage of the driving transistor DT, and provide the compensated threshold voltage deviation and the data signal provided by the data line itself to the driving transistor DT to achieve threshold compensation for the driving transistor DT. The threshold compensation module 102 set in this embodiment can improve the display unevenness problem caused by the difference in the threshold voltage of the driving transistor DT caused by the manufacturing process and the threshold voltage drift of the driving transistor DT caused by transistor aging.

[0042] In the prior art, in the driving cycle of the pixel circuit driving the light-emitting element for display, when the pixel circuit works in the light-emitting stage, the gate potential of the driving transistor is higher than the potential of its second pole (such as the drain), and the driving transistor is forward biased, causing the driving transistor to produce a hysteresis effect. Such a long-term setting will cause the ion polarization inside the driving transistor, and then form a built-in electric field inside the driving transistor, causing the threshold voltage of the driving transistor to increase continuously. The threshold voltage drift causes the display brightness to be unstable when the screen is switched, and the human eye can perceive the screen flickering, that is, the hysteresis effect of the driving transistor is an important factor affecting the display effect. The threshold voltage offset caused by the hysteresis effect is at the nanosecond level, while the compensation threshold value of the threshold compensation module in the pixel circuit in the prior art is at the microsecond level or millisecond level. It can be seen that the threshold compensation module in the conventional pixel circuit can no longer compensate for the threshold voltage offset caused by the hysteresis effect. Since the driving transistor in the pixel circuit works in a positive bias state to provide a driving current to the light-emitting element, when the driving transistor works in this bias state for a long time, it will cause a threshold offset, thereby affecting the display effect.

[0043] Therefore, the pixel circuit 10 of the present embodiment further includes a bias adjustment module 103, the first end of the bias adjustment module 103 is electrically connected to the bias adjustment signal Vbias, the second end of the bias adjustment module 103 is electrically connected to the first electrode of the driving transistor DT, and the bias adjustment module 103 is used to provide the bias adjustment signal Vbias to the first electrode of the driving transistor DT to adjust the bias state of the driving transistor DT, and to control the bias adjustment module 103 to write the bias adjustment signal Vbias to the first electrode of the driving transistor DT at a part of the time when the pixel circuit 10 is working, so as to adjust the bias state of the driving transistor DT, improve the threshold drift problem of the driving transistor DT, and enhance the display effect. It can be understood that the present embodiment does not limit the working time of the bias adjustment module 103, and it only needs to meet the requirement before the light-emitting element 20 emits light. Optionally, in the present embodiment, the bias adjustment signal Vbias may be provided by a bias signal line (not shown in the figure) in the display panel 000, or in some other optional embodiments, the bias adjustment signal Vbias may also reuse the driving signal included in the pixel circuit 10 itself, such as multiplexing the data signal to achieve bias adjustment, or may also reuse the data signal of the next row to bias adjust the driving transistor DT of the current row when bias adjustment is performed on the current row. The present embodiment does not limit this, and specific reference may be made to the bias adjustment structure in the relevant technology for understanding.

[0044] It can be understood that the present embodiment is only an example to illustrate the electrical connection structure of the pixel circuit 10 of each sub-pixel 00 in the display panel 000. In specific implementation, the pixel circuit 10 may also include other structures, such as a reset module for resetting, a light control module for controlling the light emission of the light-emitting element 20, etc. The present embodiment is not elaborated here, and the specific details can be understood by referring to the circuit structure of the organic light-emitting diode display panel in the related technology.

[0045] The first electrode of the driving transistor DT of the present embodiment is connected to the first power signal Vpvdd, and the second electrode of the driving transistor DT is connected to the second power signal Vpvee. Optionally, a light-emitting element 20 may be provided between the second electrode of the driving transistor DT and the second power signal Vpvee. It can be understood that the connection of the first electrode of the driving transistor DT of the present embodiment to the first power signal Vpvdd may be understood as a plurality of ways to achieve electrical connection therebetween. For example, when no other structures are included between the first electrode of the driving transistor DT and the first power signal Vpvdd, the electrical connection may be achieved by directly connecting the first electrode of the driving transistor DT to the first power signal Vpvdd. If other structures are included between the first electrode of the driving transistor DT and the first power signal Vpvdd, such as the pixel circuit 10 may further include a first light-emitting control transistor connected to the first electrode of the driving transistor DT, then when the first light-emitting control transistor is turned on, the connection of the first electrode of the driving transistor DT to the first power signal Vpvdd may also achieve electrical connection. The present embodiment does not limit the specific structure of the electrical connection of the first electrode of the driving transistor DT to the first power signal Vpvdd. In specific implementation, it may be understood according to the actual design structure of the pixel circuit. In this embodiment, the second electrode of the driving transistor DT is connected to the second power signal Vpvee, which can also be understood as the pixel circuit 10 can also include a second light-emitting control transistor connected to the second electrode of the driving transistor DT, and in this case, when the second light-emitting control transistor is turned on, the second electrode of the driving transistor DT and the light-emitting element 20 and the second power signal Vpvee can also be electrically connected. In this embodiment, the first power signal Vpvdd can be provided by the first power signal line (not shown in the figure) in the display panel 000, and the second power signal Vpvee can be provided by the second power signal line (not shown in the figure) in the display panel 000, which is not described in detail in this embodiment. When the pixel circuit 10 drives the light-emitting element 20 electrically connected thereto to emit light, the conductive path between the first power signal Vpvdd, the driving transistor DT, the light-emitting element 20, and the second power signal Vpvee can be used to enable the driving transistor DT to generate a driving current that drives the light-emitting element 20 to emit light, thereby achieving the light-emitting effect of the light-emitting element 20.

[0046] In this embodiment, the first power signal Vpvdd connected to the first electrode of the driving transistor DT in the pixel circuit 10 is set to a fixed value, and the second power signal Vpvee connected to the second electrode of the driving transistor DT is set to a variable value. Since the power consumption of the pixel circuit 10 is mainly determined by the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee multiplied by the driving current on the conductive path, and the driving current is affected by the luminous display brightness, at a certain luminous display brightness, if power consumption needs to be saved, the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee can be reduced. Therefore, in this embodiment, the first power signal Vpvdd is set to a fixed value, and the second power signal Vpvee is set to a variable value. The voltage value of the second power signal Vpvee can change with the brightness required by the display panel 000. If the luminous display brightness required by the display panel 000 is reduced, that is, a large voltage difference between the first power signal Vpvdd and the second power signal Vpvee is not required, the voltage value of the second power signal Vpvee can be increased to reduce the voltage difference between the first power signal Vpvdd and the second power signal Vpvee, thereby saving the power consumption of the panel. Or when the luminous display brightness required by the entire display panel 000 is high, the voltage value of the second power signal Vpvee can be reduced to increase the voltage difference between the first power signal Vpvdd and the second power signal Vpvee, so as to ensure the overall brightness of the display panel 000. Or when the usage scenario changes to a situation where only a very small area of ​​the display panel 000 requires a higher luminous brightness, and the brightness of other areas is 0 or very dark, the value of the second power signal Vpvee can be adjusted high so that the voltage difference between the first power signal Vpvdd and the second power signal Vpvee is smaller. For example, the voltage value of the second power signal Vpvee can be increased from the original 0V to 0.3V, so that the voltage difference between the first power signal Vpvdd and the second power signal Vpvee is reduced, which is beneficial to saving the power consumption of the entire panel.

[0047] However, in order to reduce power consumption, when the value of the second power signal Vpvee is dynamically adjusted, during the operation of the pixel circuit 10, as the second power signal Vpvee changes dynamically, the second electrode of the driving transistor DT, i.e. Figure 2The potential of the third node N3 in the display panel 000 changes accordingly, and the bias characteristic of the driving transistor DT will also change. If a fixed-value bias adjustment signal Vbias is used to adjust the bias state of the driving transistor DT at this time, in the frame holding stage of the pixel circuit 10, the working potential of the driving transistor DT is the potential of the gate of the driving transistor DT, that is, the first node N1, minus the voltage value of the first power signal Vpvdd minus the potential of the third node N3, and the potential of the third node N3 is directly related to the second power signal Vpvee. When the display panel 000 dynamically adjusts the value of the second power signal Vpvee in order to reduce power consumption, the potential of the third node N3 will also change dynamically. In this way, the dynamic change of the potential of the third node N3 causes the working potential of the driving transistor DT, that is, the potential of the first node N1, to change, thereby causing the bias characteristic of the driving transistor DT to change. When the pixel circuit 10 works in the frame holding stage, the state of the driving transistor DT will also change, causing the luminous brightness to deviate, which is not conducive to improving the display quality of the display panel 000.

[0048] Therefore, in order to reduce the power consumption of the panel while ensuring the display quality, the present embodiment sets the bias adjustment signal Vbias as a variable value, that is, the bias adjustment signal Vbias connected to the bias adjustment module 103 changes with the change of the second power supply signal Vpvee, so as to adjust the bias state of the driving transistor DT through the bias adjustment signal Vbias connected to the bias adjustment module 103. Specifically, when the bias adjustment module 103 is turned on, the bias adjustment signal Vbias is applied to the first electrode of the driving transistor DT, that is, the second node N2. Since the driving transistor DT is turned on, the bias adjustment signal Vbias is also transmitted to the second electrode of the driving transistor DT, that is, the third node N3. At this time, the threshold compensation module 102 is also turned on, so the bias adjustment signal Vbias is written into the gate of the driving transistor DT, that is, the first node N1. Since the bias adjustment signal Vbias is a relatively high voltage value, that is, no matter what the picture displayed in the previous frame is, the driving transistor DT needs to be written with the bias adjustment signal Vbias once when writing the current picture, thereby weakening the bias effect of the previous frame display picture, so that the state of the driving transistor DT when writing the current display picture is closer to the preset state, thereby weakening the bias difference of the driving transistor DT when the current frame and the previous frame display pictures are displayed, improving the threshold drift problem of the driving transistor DT, and enhancing the display effect. The signal Vpvee can reduce the panel power consumption. Therefore, in this embodiment, the bias adjustment signal Vbias is changed so that the second power signal Vpvee that changes dynamically is used according to the demand of the light-emitting display brightness to reduce the panel power consumption. The bias adjustment signal Vbias connected to the bias adjustment module 103 also changes dynamically with it. For example, when the brightness required by the display panel 000 is low and the voltage difference between the first power signal Vpvdd and the second power signal Vpvee needs to be reduced, the second power signal Vpvee is raised. When the second power signal Vpvee is raised, the potential of the third node N3 is also raised. Therefore, the working potential of the driving transistor DT is the driving transistor DT. The value obtained by subtracting the voltage value of the first power supply signal Vpvdd from the potential of the third node N3 from the potential of the DT gate, i.e., the first node N1, will decrease. After the decrease, it is equivalent to that the negative bias (i.e., reverse bias) of the driving transistor DT will be enhanced when the pixel circuit 10 controls the light-emitting element 20 in the light-emitting stage. Therefore, in order to ensure the adjustment effect of the bias state of the driving transistor DT, it is necessary to weaken the negative bias state of the driving transistor DT, i.e., at this time, the voltage value of the bias adjustment signal Vbias can be reduced to avoid the deviation of the light-emitting brightness of the light-emitting element 20 from the originally required brightness due to the change of the second power supply signal Vpvee, which is beneficial to improve the display quality of the display panel 000.

[0049] It is understandable that when the display panel 000 is an organic light emitting diode display panel, the signal line layout in the display panel 000 is relatively complex. Figure 1 The data line S shown in the figure may also include other signal lines such as scan lines, reference voltage lines, power signal lines, etc. (not shown in the figure). One sub-pixel row may correspond to multiple scan lines. During specific implementation, the layout structure of the signal routing in this embodiment can be understood based on actual conditions.

[0050] It can be understood that the pixel circuit 10 of this embodiment is described by taking the driving transistor DT as a P-type transistor as an example. In specific implementation, the type of the driving transistor DT includes but is not limited to this, and this embodiment does not limit this.

[0051] It should be noted that the display panel 000 provided in this embodiment can be an organic light emitting diode display panel. The figure of this embodiment only illustrates the structure of the display panel for example. In specific implementation, the structure of the display panel 000 includes but is not limited to this, and may also include other structures that can realize the display function. For details, please refer to the structure of the organic light emitting diode display panel in the relevant technology for understanding, and this embodiment will not be elaborated here.

[0052] In some optional embodiments, please continue to refer to Figure 1 and Figure 2 In this embodiment, the display brightness change trend of the display panel 000 is inversely proportional to the change trend of the second power signal Vpvee, and the change trend of the bias adjustment signal Vbias is inversely proportional to the change trend of the second power signal Vpvee. Optionally, when the value of the second power signal Vpvee increases, the value of the bias adjustment signal Vbias decreases.

[0053] This embodiment explains that since the power consumption of the pixel circuit 10 is mainly determined by the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee multiplied by the driving current on the conductive path, and the driving current is affected by the light-emitting display brightness, at a certain light-emitting display brightness, if it is necessary to save power consumption, the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee can be reduced. The power consumption of the light-emitting element 20 can be calculated using P=UI, where P represents the power consumption of the light-emitting element 20, U represents the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee, and I represents the driving current on the conductive path formed by the driving transistor DT and the light-emitting element 20 flowing between the first power signal Vpvdd and the second power signal Vpvee. When the display brightness of the display panel 000 remains unchanged, that is, I remains unchanged, the smaller the voltage difference U between the first power signal Vpvdd and the second power signal Vpvee, the smaller the power consumption P of the light-emitting element 20. Therefore, according to the change of the display brightness of the display panel 000, the value of the second power signal Vpvee can be dynamically adjusted, which can effectively reduce the power consumption of the light-emitting element 20, and further reduce the power consumption of the display panel 000 as a whole. Therefore, in this embodiment, the first power signal Vpvdd is set as a fixed value, and the second power signal Vpvee is set as a variable value. The voltage value of the second power signal Vpvee can change with the change of the brightness required by the display panel 000, and the change trend of the display brightness of the display panel 000 is inversely proportional to the change trend of the second power signal Vpvee. When the light-emitting display brightness required by the display panel 000 is reduced, that is, when a large voltage difference between the first power signal Vpvdd and the second power signal Vpvee is not required, the voltage difference between the first power signal Vpvdd and the second power signal Vpvee can be reduced by increasing the voltage value of the second power signal Vpvee. When the light-emitting display brightness required by the entire display panel 000 is high, the voltage difference between the first power signal Vpvdd and the second power signal Vpvee can be reduced by reducing the second power signal Vp vee, so that the voltage difference between the first power signal Vpvdd and the second power signal Vpvee increases to ensure the overall brightness of the display panel 000, that is, when the display brightness required by the display panel 000 is high, the voltage value of the second power signal Vpvee is reduced so that the voltage difference between the first power signal Vpvdd and the second power signal Vpvee increases; when the display brightness required by the display panel 000 is low, the voltage value of the second power signal Vpvee is increased so that the voltage difference between the first power signal Vpvdd and the second power signal Vpvee decreases; the display brightness change trend of the display panel 000 is inversely proportional to the change trend of the second power signal Vpvee; the value of the second power signal Vpvee is dynamically adjusted according to the display brightness, which is beneficial to saving the power consumption of the overall panel.When the bias adjustment signal Vbias changes dynamically following the second power signal Vpvee, the change trend of the bias adjustment signal Vbias is inversely proportional to the change trend of the second power signal Vpvee. Optionally, when the value of the second power signal Vpvee increases, the value of the bias adjustment signal Vbias decreases. For example, when the brightness required by the display panel 000 is low and the voltage difference between the first power signal Vpvdd and the second power signal Vpvee needs to be reduced, the second power signal Vpvee is raised, and when the second power signal Vpvee is raised, the potential of the second electrode of the driving transistor DT, i.e., the third node N3, is also raised. Therefore, the working potential of the driving transistor DT is the potential of the gate of the driving transistor DT, i.e., the first node N1, minus the voltage value of the first power signal Vpvdd and then minus the potential of the third node N3, which will decrease. After the decrease, it is equivalent to the pixel circuit 10 controlling the light emitting element 2 0, the negative bias (i.e., reverse bias) of the driving transistor DT will be enhanced. Therefore, in order to ensure the adjustment effect of the bias state of the driving transistor DT, it is necessary to weaken the negative bias state of the driving transistor DT, that is, the voltage value of the bias adjustment signal Vbias can be reduced at this time, that is, when the value of the second power supply signal Vpvee is raised, the value of the bias adjustment signal Vbias decreases accordingly, so that the change trend of the bias adjustment signal Vbias is inversely proportional to the change trend of the second power supply signal Vpvee, which can avoid the deviation of the luminous brightness of the light-emitting element 20 from the originally required brightness due to the change of the second power supply signal Vpvee, thereby helping to improve the display quality of the display panel 000.

[0054] In some optional embodiments, please continue to refer to Figure 1 and Figure 2 In this embodiment, the increase amount of the value of the second power signal Vpvee is ΔA, and the decrease amount of the value of the bias adjustment signal Vbias is ΔB; wherein ΔB≤0.5ΔA.

[0055] This embodiment explains that when the bias adjustment signal Vbias provided in the display panel 000 changes dynamically following the second power signal Vpvee, and the change trend of the bias adjustment signal Vbias is inversely proportional to the change trend of the second power signal Vpvee, the increase amount of the value of the second power signal Vpvee can be set to ΔA, and the decrease amount of the value of the bias adjustment signal Vbias can be set to ΔB, ΔB≤0.5ΔA, that is, the change amount of the bias adjustment signal Vbias is half of the change amount of the second power signal Vpvee, or the change amount of the bias adjustment signal Vbias is less than the change amount of the second power signal Vpvee. When the scheme of dynamically adjusting the second power signal Vpvee is adopted, the change of the second power signal Vpvee only causes the potential change of the second pole of the driving transistor DT, that is, the third node N3, and the potential of the first pole of the driving transistor DT, that is, the second node N2, does not change, and the bias adjustment signal Vbi dynamically adjusted by the bias adjustment module 103 is applied. As, it is applied to the first electrode of the driving transistor DT, that is, the second node N2, and the second electrode of the driving transistor DT, that is, the third node N3, at the same time, that is, when the value of the applied bias adjustment signal Vbias changes, the potentials of the second node N2 and the third node N3 will change. Therefore, the change value of the bias adjustment signal Vbias can be set to be smaller than the change value of the second power signal Vpvee. Specifically, the change amount of the bias adjustment signal Vbias is half of the change amount of the second power signal Vpvee, or the change amount of the bias adjustment signal Vbias is smaller than the change amount of the second power signal Vpvee. This can achieve a stronger effect of adjusting the bias voltage, which is beneficial to avoid the deviation of the luminous brightness of the light-emitting element 20 from the originally required brightness due to the change of the second power signal Vpvee. While improving the display quality of the display panel 000, it can also reduce the change amount of the bias adjustment signal Vbias and avoid the waste of power consumption caused by the excessive change range of the bias adjustment signal Vbias.

[0056] In some optional embodiments, please refer to Figure 1 and Figure 3 , Figure 3 yes Figure 1 Another schematic diagram of the circuit connection structure of the neutron pixel, in this embodiment, the control end of the bias adjustment module 103 is electrically connected to the first scanning signal Scan1, and the bias adjustment module 103 is used to provide the bias adjustment signal Vbias to the first electrode of the driving transistor DT, that is, the second node N2, under the control of the effective level of the first scanning signal Scan1.

[0057] This embodiment explains that the display panel 000 may include at least a plurality of first scan signal lines (not shown in the figure), and the first scan signal lines may be used to provide a first scan signal Scan1 to a control end of the bias adjustment module 103. Under the control of the effective level of the first scan signal Scan1, the bias adjustment module 103 is turned on, so that the bias adjustment signal Vbias can be transmitted to the first electrode, i.e., the second node N2, of the driving transistor DT through the turned-on bias adjustment module 103, thereby adjusting the bias state of the driving transistor DT, improving the threshold drift problem of the driving transistor DT, and enhancing the display effect.

[0058] It can be understood that the effective level of the first scanning signal Scan1 provided by the first scanning signal line in this embodiment can be understood as a voltage signal that can turn on the bias adjustment module 103, and the ineffective level of the first scanning signal Scan1 can be understood as a voltage signal that can turn off the bias adjustment module 103. When the bias adjustment module 103 includes a P-type transistor, the control end of the bias adjustment module 103 can be understood as the gate of the P-type transistor. At this time, the effective level of the first scanning signal Scan1 is a low-level voltage signal. If the bias adjustment module 103 includes an N-type transistor, the control end of the bias adjustment module 103 can be understood as the gate of the N-type transistor. At this time, the effective level of the first scanning signal Scan1 is a high-level voltage signal. This embodiment does not make specific limitations on this. The effective level of the first scanning signal Scan1 can be selected according to the specific setting structure of the pixel circuit 10, and it is only necessary to satisfy that the bias adjustment module 103 is turned on under the control of the effective level of the first scanning signal Scan1.

[0059] Optional, please refer to Figure 1 , Figure 3 and Figure 4 , Figure 4 yes Figure 3 In the comparison diagram of the change trend of the effective level of the first scanning signal in FIG. 1 , in this embodiment, the value of the second power signal Vpvee increases, and the maintenance time of the effective level of the first scanning signal Scan1 decreases. It can be understood that in this embodiment, Figure 4 In the description, the effective level of the first scanning signal Scan1 is taken as an example to be low level.

[0060] This embodiment explains that when the bias adjustment signal Vbias provided in the display panel 000 changes dynamically following the second power signal Vpvee, and the change trend of the bias adjustment signal Vbias is inversely proportional to the change trend of the second power signal Vpvee, the bias adjustment effect of the bias adjustment signal Vbias on the driving transistor DT can be controlled by adjusting the effective level maintenance time of the first scanning signal Scan1, such as Figure 4As shown, the dotted line represents the effective level maintenance time t1' of the first scanning signal Scan1 originally required for adjusting the bias state of the driving transistor DT, and the solid line represents the effective level maintenance time t1 of the first scanning signal Scan1 required for the bias state of the driving transistor DT when the value of the second power signal Vpvee provided in this embodiment is dynamically adjusted to increase and the bias adjustment signal Vbias follows to decrease, t1 is less than t1', when the value of the second power signal Vpvee is dynamically adjusted to increase its voltage value, by reducing the effective level maintenance time of the first scanning signal Scan1, if the bias adjustment signal Vbias originally required for adjusting the bias state of the driving transistor DT requires the effective level maintenance time of the first scanning signal Scan1 to be t1', and after the value of the second power signal Vpvee in this embodiment is increased, the value of the bias adjustment signal Vbias needs to be reduced, then the effective level maintenance time of the first scanning signal Scan1 can be shortened to t1, which is equivalent to shortening the bias adjustment module 10 3 can reduce the value of the bias adjustment signal Vbias. Since the bias adjustment module 103 is turned on under the control of the effective level of the first scan signal Scan1, the bias effect is the strongest. When the bias adjustment module 103 is turned off, that is, the first scan signal Scan1 becomes an ineffective level, the bias adjustment process only relies on the parasitic capacitance on the second node N2 to maintain the bias effect. Since the parasitic capacitance will slowly leak electricity, the effect of the negative bias on the driving transistor DT will be weakened, that is, shortening the maintenance time of the effective level of the first scan signal Scan1 can weaken the effect of the negative bias on the driving transistor DT in the bias adjustment stage, so that when the value of the second power signal Vpvee is raised, the value of the bias adjustment signal Vbias decreases accordingly, which can still meet the adjustment effect of the bias state of the driving transistor DT, thereby avoiding the deviation of the luminous brightness of the light-emitting element 20 from the originally required brightness due to the change of the second power signal Vpvee, thereby helping to improve the display quality of the display panel 000.

[0061] In some optional embodiments, please refer to Figure 1 and Figure 5 , Figure 5 yes Figure 1 Another schematic diagram of the circuit connection structure of the neutron pixel, in this embodiment, the pixel circuit 10 further includes a first light emitting control module 104, a second light emitting control module 105, a first reset module 106, and a second reset module 107;

[0062] A first terminal of the first light emitting control module 104 is electrically connected to the first power supply signal Vpvdd, and a second terminal of the first light emitting control module 104 is electrically connected to the first electrode of the driving transistor DT;

[0063] A first end of the second light emitting control module 105 is electrically connected to a first electrode of the driving transistor DT, and a second end of the second light emitting control module 105 is electrically connected to the light emitting element 20;

[0064] A first terminal of the first reset module 106 is electrically connected to the first reset signal Vref1, and a second terminal of the first reset module 106 is electrically connected to the gate of the driving transistor DT;

[0065] A first end of the second reset module 107 is electrically connected to the second reset signal Vref2 , and a second end of the second reset module 107 is electrically connected to the light emitting element 20 .

[0066] This embodiment explains the module connection structure of the pixel circuit 10 and the light-emitting element 20 of each sub-pixel P. Optionally, the pixel circuit 10 includes a data writing module 101 and a bias adjustment module 103 connected to the first electrode of the driving transistor DT, a threshold compensation module 102 connected between the gate and the second electrode of the driving transistor DT, and also includes a first light-emitting control module 104, a second light-emitting control module 105, a first reset module 106, and a second reset module 107. When the pixel circuit 10 works in the light-emitting stage, the first light-emitting control module 104 and the second light-emitting control module 105 are turned on, a conduction circuit is formed between the first power signal Vpvdd and the second power signal Vpvee, and the light-emitting element 20 emits light. The first light-emitting control module 104 and the second light-emitting control module 105 cooperate to provide a driving current to the light-emitting element 20, wherein the first light-emitting control module 104 is turned on, and the positive voltage signal provided by the first power supply signal Vpvdd is provided to the first electrode of the driving transistor DT, and the driving transistor DT is turned on under the control of its gate voltage, and the voltage signal of the first electrode of the driving transistor DT is provided to the second electrode of the driving transistor DT; the second light-emitting control module 105 is turned on, and the voltage signal of the second electrode of the driving transistor DT is provided to the light-emitting element 20, so as to realize that the driving current flows through the light-emitting element 20 and controls the light-emitting element 20 to emit light. When the data writing module 101 is turned on, the data signal Vdata on the data line S can be transmitted to the driving transistor DT. When the bias adjustment module 103 is turned on, the bias adjustment signal Vbias provided on the bias voltage signal line can be transmitted to the driving transistor DT to adjust the bias state of the driving transistor DT. When the threshold compensation module 102 is turned on, the threshold compensation of the driving transistor DT can be performed. When the first reset module 106 is turned on, the gate potential of the driving transistor DT is the first reset signal Vref1, and the gate of the driving transistor DT is reset, so that the driving transistor DT can be turned on during threshold compensation. When the second reset module 107 is turned on, the anode potential of the light-emitting element 20 is the second reset signal Vref2, and the second reset signal Vref2 initializes the anode of the light-emitting element 20, so as to improve the residual of the data signal of the previous frame, improve the afterimage phenomenon, and enhance the display effect of the display panel 000. Optionally, the first reset signal Vref1 and the second reset signal Vref2 in this embodiment can be the same or different, and can be set according to actual needs during specific implementation.

[0067] It can be understood that the dynamic adjustment of the second power signal Vpvee and the bias adjustment signal Vbias in this embodiment can be directly adjusted by the second power signal line that inputs the second power signal Vpvee and the bias voltage signal line that inputs the bias adjustment signal Vbias. For example, the second power signal line and the bias voltage signal line can be connected to the driver chip or flexible circuit board bound to the display panel 000, and the potential signal input through the input pad of the driver chip or the flexible circuit board directly changes the dynamic value of the second power signal Vpvee and the bias adjustment signal Vbias, or the dynamic adjustment of the bias adjustment signal Vbias can also be achieved by changing the on-time of the bias adjustment module 103, such as controlling the maintenance time of the effective level of the first scan signal Scan1, which can also change the value of the bias adjustment signal Vbias to follow the dynamic changes of the second power signal Vpvee to ensure the display quality of the display panel 000. This embodiment does not limit the method of this dynamic adjustment.

[0068] Optional, such as Figure 1 and Figure 6 As shown, Figure 6 yes Figure 1 Another schematic diagram of the circuit connection structure of the neutron pixel, in this embodiment, the data writing module 101 includes a first transistor M1, the gate of the first transistor M1 is electrically connected to the second scanning signal Scan2, the source of the first transistor M1 is electrically connected to the data signal Vdata, and the drain of the first transistor M1 is electrically connected to the first electrode of the driving transistor DT;

[0069] The bias adjustment module 103 includes a second transistor M2, a gate of the second transistor M2 is electrically connected to the first scan signal Scan1, a source of the second transistor M2 is electrically connected to the bias adjustment signal Vbias, and a drain of the second transistor M2 is electrically connected to the first electrode of the driving transistor DT;

[0070] The threshold compensation module 102 includes a third transistor M3, a gate of the third transistor M3 is electrically connected to the third scan signal Scan3, a source of the third transistor M3 is electrically connected to the gate of the driving transistor DT, and a drain of the third transistor M3 is electrically connected to the second electrode of the driving transistor DT;

[0071] The first light emitting control module 104 includes a fourth transistor M4, a gate of the fourth transistor M4 is electrically connected to the first light emitting control signal EM1, a source of the fourth transistor M4 is electrically connected to the first power supply signal Vpvdd, and a drain of the fourth transistor M4 is electrically connected to the first electrode of the driving transistor DT;

[0072] The second light emitting control module 105 includes a fifth transistor M5, a gate of the fifth transistor M5 is electrically connected to the second light emitting control signal EM2, a source of the fifth transistor M5 is electrically connected to the second electrode of the driving transistor DT, and a drain of the fifth transistor M5 is electrically connected to the anode of the light emitting element 20;

[0073] The first reset module 106 includes a sixth transistor M6, a gate of the sixth transistor M6 is electrically connected to the fourth scan signal Scan4, a source of the sixth transistor M6 is electrically connected to the first reset signal Vref1, and a drain of the sixth transistor M6 is electrically connected to the gate of the driving transistor DT;

[0074] The second reset module 107 includes a seventh transistor M7 , a gate of the seventh transistor M7 is electrically connected to the first scan signal Scan1 , a source of the seventh transistor M7 is electrically connected to the second reset signal Vref2 , and a drain of the seventh transistor M7 is electrically connected to the anode of the light emitting element 20 .

[0075] Further optionally, the pixel circuit 10 also includes a storage capacitor C, one end of the storage capacitor C is connected to the first power signal Vpvdd, and the other end of the storage capacitor C is connected to the gate of the driving transistor DT. The storage capacitor C is used to stabilize the potential of the gate of the driving transistor DT, which is beneficial for the driving transistor DT to remain turned on.

[0076] It can be understood that, in this embodiment, the third transistor M3 and the sixth transistor M6 connected to the gate of the driving transistor DT are N-type metal oxide transistors, and the first transistor M1, the second transistor M2, the fourth transistor M4, the fifth transistor M5, the seventh transistor M7, and the driving transistor DT are all P-type low-temperature polysilicon transistors. The third transistor M3 and the sixth transistor M6 are N-type metal oxide transistors, the third transistor M3 is electrically connected to the gate of the driving transistor DT, and the sixth transistor M6 is also electrically connected to the gate of the driving transistor DT. The metal oxide transistor has a low leakage current in the off state, thereby reducing the influence of the leakage current on the gate potential of the driving transistor DT, thereby stabilizing the gate voltage of the driving transistor DT, improving the working stability of the driving transistor DT, and then ensuring the stability of the driving current, which is conducive to enabling the display panel 000 of this embodiment to ensure the uniformity of the light emitting brightness of the light emitting element 20. In particular, when the display panel 000 realizes low-frequency driving display, the display time of a frame is long, so the time that the potential of the driving transistor DT needs to be maintained is also long. If the transistor connected to the gate of the driving transistor DT is a low-temperature polysilicon transistor, it is easy to cause obvious flickering by the leakage of the transistor connected to the gate of the driving transistor DT due to the large off-state leakage of the low-temperature polysilicon transistor. Therefore, this embodiment sets the third transistor M3 and the sixth transistor M6 as N-type metal oxide transistors, and utilizes their small off-state leakage characteristics, so that the potential of the gate of the driving transistor DT can be maintained for a long time when the display panel 000 realizes low-frequency driving display, thereby improving the flickering phenomenon during low-frequency driving and enhancing the display effect.

[0077] like Figure 6 and Figure 7 As shown, Figure 7 yes Figure 6 In the working timing diagram of the pixel circuit, in the sub-pixel P provided in this embodiment, the working process of the pixel circuit 10 at least includes a first bias adjustment stage T1, a reset stage T2, a threshold compensation and data writing stage T3, and a light emitting stage T4;

[0078] In the first bias adjustment stage T1, that is, before resetting the gate of the driving transistor DT, the first scanning signal Scan1 can be input with a low-level signal to control the second transistor M2 of the bias adjustment module 103 to be turned on, and the high-potential signal of the third scanning signal Scan3 can control the third transistor M3 of the threshold compensation module 102 to be turned on, and the bias adjustment signal Vbias is transmitted to the driving transistor DT through the second transistor M2 to adjust the bias state of the driving transistor DT, so that the driving transistor DT is reverse biased, the first electrode and the second electrode of the driving transistor DT are reversed, the degree of ion polarization inside the driving transistor DT is weakened, and the threshold voltage of the driving transistor DT is reduced. The threshold voltage of the driving transistor DT is adjusted by biasing the driving transistor DT to compensate for the threshold voltage drift problem caused by the hysteresis effect of the driving transistor due to the forward bias state of the driving transistor DT. Optionally, the bias adjustment signal Vbias can be a DC positive voltage signal. Since the bias adjustment signal Vbias is a relatively high positive voltage value, that is, no matter what the picture displayed in the previous frame is, before resetting the gate of the driving transistor DT and writing the current picture, the driving transistor DT needs to be written with the bias adjustment signal Vbias once, so that the sub-pixel 00 experiences the same writing of the bias adjustment signal Vbias before resetting the gate of the driving transistor DT, and the written bias adjustment signal Vbias is a relatively high positive voltage value, so that a large instantaneous current can flow through the driving transistor DT. This current can adjust the bias defect problem inside the driving transistor DT, and can improve the hysteresis characteristics of the driving transistor DT, thereby reducing the bias effect of the previous frame display picture, so that the state of the driving transistor DT when writing the current display picture is closer to the preset, thereby reducing the bias difference of the driving transistor DT when the current frame and the previous frame display pictures are displayed, improving the threshold drift problem of the driving transistor DT, and enhancing the display effect.

[0079] In the reset stage T2, the fourth scan signal Scan4 is an effective level signal. If the sixth transistor M6 is an N-type metal oxide transistor, the fourth scan signal Scan4 controls the sixth transistor M6 of the first reset module 106 to turn on under a high potential signal, and the first reset signal Vref1 resets the gate of the driving transistor DT.

[0080] In the threshold compensation and data writing stage T3, the second scan signal line Scan2 inputs a low potential signal to control the first transistor M1 of the data writing module 101 to turn on, and the high potential signal of the third scan signal Scan3 controls the third transistor M3 of the threshold compensation module 102 to turn on. The data voltage signal after threshold compensation provided by the data line S is transmitted to the gate of the driving transistor DT through the first transistor M1, the driving transistor DT, and the third transistor M3, and the threshold compensation is performed on the driving transistor DT to self-compensate the deviation of the threshold voltage of the driving transistor DT.

[0081] In the light-emitting stage T4, the first light-emitting control signal EM1 inputs a low-potential signal to control the fourth transistor M4 of the first light-emitting control module 104 to be turned on, and the second light-emitting control signal EM2 inputs a low-potential signal to control the fifth transistor M5 of the second light-emitting control module 105 to be turned on. The driving transistor DT generates a driving current under the control of its gate voltage. The first light-emitting control signal EM1 and the second light-emitting control signal EM2 can be provided by the same light-emitting control signal line. A conductive path is formed among the first power supply signal Vpvdd, the fourth transistor M4, the driving transistor DT, the fifth transistor M5, the light-emitting element 20, and the second power supply signal Vpvee. The driving current is provided to the light-emitting element 20 to realize the driving current flowing through the light-emitting element 20 and control the light-emitting element 20 to emit light.

[0082] It should be noted that, in specific implementation, the connection structure of the pixel circuit 10 of this embodiment includes but is not limited to the above structure and driving sequence, and may also be other connection structures and driving methods, which are not limited in this embodiment.

[0083] It can be understood that the low-voltage signal of the first scanning signal Scan1 of this embodiment can also control the conduction of the seventh transistor M7 of the second reset module 107, and the second reset signal Vref2 resets the anode of the light-emitting element 20 through the seventh transistor M7, so that the anode of the light-emitting element 20 is initialized, thereby improving the residual data signal of the previous frame, improving the afterimage phenomenon, and enhancing the display effect of the display panel 000.

[0084] The working stage of the pixel circuit 10 provided in this embodiment may also include a power regulation stage T5, and the power regulation stage T5 is used to dynamically adjust the value of the second power signal Vpvee according to the display brightness required by the display panel 000. When the brightness required by the display panel 000 is low and the voltage difference between the first power signal Vpvdd and the second power signal Vpvee needs to be reduced, the value of the second power signal Vpvee can be raised through the second power signal line in the power regulation stage T5 to reduce the voltage difference between the first power signal Vpvdd and the second power signal Vpvee and reduce power consumption. Optionally, the working time of the power regulation stage T5 in this embodiment can be set to at least partially overlap with the working time of the first bias regulation stage T1, that is, when the second power signal Vpvee is dynamically adjusted in the power regulation stage T5, the bias regulation signal Vbias can be synchronously adjusted and the work of the first bias regulation stage T1 can be performed. The synchronous adjustment of the bias regulation signal Vbias is specifically that when the second power signal Vpvee is raised, the potential of the third node N3 is also raised, so the working potential of the driving transistor DT is the potential of the gate of the driving transistor DT, that is, the first node N1 minus the voltage value of the first power signal Vpvdd minus the potential of the third node N3. The value of the bit will decrease, which is equivalent to increasing the negative bias (i.e., reverse bias) of the driving transistor DT when the pixel circuit 10 controls the light-emitting element 20 in the light-emitting stage. Therefore, in order to ensure the adjustment effect of the bias state of the driving transistor DT, it is necessary to weaken the negative bias state of the driving transistor DT, that is, at this time, the voltage value of the bias adjustment signal Vbias can be reduced, and the bias state of the driving transistor DT can be adjusted using the reduced bias adjustment signal Vbias to avoid the light-emitting brightness of the light-emitting element 20 deviating from the originally required brightness due to the change of the second power supply signal Vpvee, which is beneficial to improving the display quality of the display panel 000.

[0085] Optionally, this embodiment only illustrates the time period in which the power regulation stage T5 can be set in the working stage of the pixel circuit 10. In specific implementation, the power regulation stage T5 for dynamically adjusting the second power signal Vpvee is not limited to this time period, but can also be performed in the light-emitting stage T4 of the light-emitting element 20. This embodiment does not make any specific limitation on this.

[0086] In some optional embodiments, please refer to Figure 1 and Figure 8 , Figure 8 yes Figure 1 Another schematic diagram of the circuit connection structure of the neutron pixel. In this embodiment, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, and the driving transistor DT are all P-type low-temperature polysilicon transistors.

[0087] This embodiment explains that the transistors included in the pixel circuit 10 can all be P-type transistors, such as P-type low-temperature polysilicon transistors. It can be understood that when the transistors in the pixel circuit 10 are all P-type transistors, this embodiment can not only utilize the high mobility and high driving speed characteristics of the low-temperature polysilicon transistor, but also make the data writing module 101 respond faster when writing the data signal. The data signal can be written quickly to avoid the phenomenon of insufficient charging caused by the long opening time of the driving transistor DT. It should be noted that when the transistors in the pixel circuit 10 in this embodiment are all P-type transistors, the polarity of the driving signal corresponding to the third scanning signal Scan3 and the fourth scanning signal Scan4 needs to be changed, and only reference is needed. Figure 7 The illustrated driving timing is to reverse the polarity of the third scanning signal Scan3 connected to the gate of the third transistor M3 and the fourth scanning signal Scan4 connected to the gate of the sixth transistor M6, so as to be suitable for the driving process of the third transistor M3 and the sixth transistor M6 as P-type transistors. In this embodiment, the driving timing of the transistors in the pixel circuit 10 are all P-type transistors is not specifically described, and the specific understanding can be referred to the driving principle of the pixel circuit in the related art.

[0088] Optional, such as Figure 1 , Fig. 9 and Fig.10 As shown, Fig. 9 yes Figure 1 Another schematic diagram of the circuit connection structure of the neutron pixel. Fig.10 yes Fig. 9 1 and 2. The working timing diagram of the pixel circuit in FIG. 1 shows that in this embodiment, the data writing module 101 is multiplexed into the bias adjustment module 103, and the data signal Vdata is multiplexed into the bias adjustment signal Vbias.

[0089] This embodiment explains that the data writing module 101 in the pixel circuit 10 can be multiplexed as the bias adjustment module 103, that is, in the first bias adjustment stage T1, the data signal Vdata can be multiplexed as the bias adjustment signal Vbias to perform bias adjustment on the driving transistor DT. Since the data writing module 101 is multiplexed as the bias adjustment module 103, it is beneficial to reduce the number of transistors in the pixel circuit 10, and it can also make Figure 6 and Figure 7 The first scanning signal and the second scanning signal in the display panel 000 can be multiplexed, which is beneficial to reducing the number of scanning lines in the display panel 000, and further beneficial to improving the aperture ratio of the sub-pixel 00 in the panel.

[0090] In some optional embodiments, please refer to Figure 1-Figure 7 , Fig.11 , Fig.11: is a flowchart of a driving method provided by an embodiment of the present invention. The driving method of the display panel provided by this embodiment can be applied to the display panel 000 in the above embodiment to perform driving work; the driving method of this embodiment at least includes: a first bias adjustment stage T1, a threshold compensation and data writing stage T3, and a light emitting stage T4, wherein the first bias adjustment stage T1 is performed before the threshold compensation and data writing stage T3;

[0091] In the first bias regulation stage T1, the bias regulation module 103 is turned on, and the bias regulation signal Vbias is provided to the first electrode of the driving transistor DT to regulate the bias state of the driving transistor DT;

[0092] In the threshold compensation and data writing phase T3, the threshold compensation module 102 detects and compensates for the deviation of the threshold voltage of the driving transistor DT, and the data writing module 101 writes the compensated threshold voltage deviation and the data signal into the driving transistor DT.

[0093] In the light emitting stage T4, the driving transistor DT generates a driving current to drive the light emitting element 20 to emit light;

[0094] The driving method further includes a power supply regulation stage T5;

[0095] In the power adjustment stage T5 , the value of the second power signal Vpvee is adjusted according to the change of the display brightness of the display panel 000 , and the value of the bias adjustment signal Vbias is adjusted according to the change of the value of the second power signal Vpvee.

[0096] In the driving method provided in this embodiment, the working stage of the pixel circuit 10 at least includes a power adjustment stage T5. Since the power consumption of the pixel circuit 10 is mainly determined by the voltage difference formed between the first power signal Vpvdd and the second power signal Vpvee multiplied by the driving current on the conductive path, and the driving current is affected by the light-emitting display brightness, the present embodiment is set in the power adjustment stage T5, and the value of the second power signal Vpvee is adjusted according to the change of the display brightness of the display panel 000. If the light-emitting display brightness required by the display panel 000 is reduced, that is, when a large voltage difference between the first power signal Vpvdd and the second power signal Vpvee is not required, the voltage value of the second power signal Vpvee can be increased to reduce the voltage difference between the first power signal Vpvdd and the second power signal Vpvee, thereby saving the power consumption of the panel. Or when the light-emitting display brightness required by the entire display panel 000 is high, the voltage value of the second power signal Vpvee can be reduced to increase the voltage difference between the first power signal Vpvdd and the second power signal Vpvee, so as to ensure the overall brightness of the display panel 000, which is conducive to saving the power consumption of the entire panel. Optionally, the present embodiment sets the working time of the power regulation stage T5 to at least partially overlap with the working time of the first bias regulation stage T1. That is, the driving method of the present embodiment is also set in the power regulation stage T5, and the value of the bias regulation signal Vbias is adjusted according to the change of the value of the second power signal Vpvee, that is, the bias regulation signal Vbias connected to the bias regulation module 103 changes with the change of the second power signal Vpvee. Specifically, when the bias regulation module 103 is turned on, the bias regulation signal Vbias is applied to the first electrode of the driving transistor DT, that is, the second node N2. Since the driving transistor DT is turned on, the bias regulation signal Vbias is also transmitted to the second electrode of the driving transistor DT, that is, the third node N3. Since the threshold compensation module 102 is also turned on at this time, the bias regulation signal Vbias is written into the gate of the driving transistor DT, that is, the first node N1. Since the bias regulation signal Vbias is a higher voltage value, that is, regardless of the previous frame No matter what the displayed picture is, when writing the current picture, the driving transistor DT needs to be written with a bias adjustment signal Vbias, so that the bias effect of the previous frame display picture can be weakened, so that the state of the driving transistor DT when writing the current display picture is closer to the preset state, thereby weakening the bias difference between the driving transistor DT when the current frame and the previous frame display pictures are displayed, improving the threshold drift problem of the driving transistor DT, and enhancing the display effect. When the dynamically changing second power supply signal Vpvee is used to reduce the panel power consumption according to the demand for luminous display brightness, the bias adjustment signal Vbias connected to the bias adjustment module 103 also changes dynamically with it, which can avoid the deviation of the luminous brightness of the light-emitting element 20 from the original required brightness due to the change of the second power supply signal Vpvee, which is beneficial to improve the display quality of the display panel 000.

[0097] Optional, please continue to combine reference Figure 1-Figure 7 , Fig.11 The driving method of this embodiment further includes a reset phase T2, which is performed between the first bias adjustment phase T1 and the threshold compensation and data writing phase T3. Further optionally, the reset phase T2 is used to reset the gate of the driving transistor DT.

[0098] The driving method provided in this embodiment is provided before the reset stage T2, that is, before resetting the gate of the driving transistor DT, so that the first scanning signal Scan1 can be input as a low-level signal to control the second transistor M2 of the bias adjustment module 103 to be turned on, and the high-potential signal of the third scanning signal Scan3 can control the third transistor M3 of the threshold compensation module 102 to be turned on, and the bias adjustment signal Vbias is transmitted to the driving transistor DT through the second transistor M2 to adjust the bias state of the driving transistor DT, so that the driving transistor DT is reversely biased, the first pole and the second pole of the driving transistor DT are reversed, the degree of ion polarization inside the driving transistor DT is weakened, and the threshold voltage of the driving transistor DT is reduced. The threshold voltage of the driving transistor DT is adjusted by biasing the driving transistor DT to compensate for the threshold voltage drift problem caused by the hysteresis effect of the driving transistor due to the forward bias state of the driving transistor DT. Since the hysteresis characteristic is that when the previous picture is black or white, the next picture is switched. Since the bias effects of the black picture and the white picture on the driving transistor DT are different, when the next picture is written, the bias state of the driving transistor DT is different, resulting in different brightness. For example, when the black picture is switched to the white picture, the brightness of the first few frames of the white picture will be darker, and there will be a ghost. Therefore, in this embodiment, the reset stage T2 is set to be executed between the first bias adjustment stage T1 and the threshold compensation and data writing stage T3. The work of the first bias adjustment stage T1 is executed before resetting the gate of the driving transistor DT. Since the bias adjustment signal Vb ias is a relatively high positive voltage value, that is, no matter what the picture displayed in the previous frame is, before resetting the gate of the driving transistor DT and when writing the current picture, the driving transistor DT needs to be written with a bias adjustment signal Vbias, thereby weakening the bias effect of the previous frame display picture, making the state of the driving transistor DT closer to the preset when writing the current display picture, thereby weakening the bias difference of the driving transistor DT when the current frame and the previous frame display pictures are displayed, improving the threshold drift problem of the driving transistor DT, and helping to improve the display problem that is prone to cause ghosting when switching between black and white pictures, thereby improving the display quality.

[0099] In some optional embodiments, please refer to Figure 1 , Figure 6 and Fig.12 , Fig.12 yes Figure 6 Another working timing diagram of the pixel circuit in FIG. 1 , in the driving method of this embodiment, the working time of the power adjustment stage T5 is set to at least partially overlap with the working time of the light emitting stage T4.

[0100] This embodiment explains that the working time of the power regulation stage T5 for dynamically regulating the second power signal Vpvee can overlap at least partially with the working time of the light emitting stage T4. When the required brightness of the display panel 000 is low and the voltage difference between the first power signal Vpvdd and the second power signal Vpvee needs to be reduced, the second power signal Vpvee is raised, and when the second power signal Vpvee is raised, the potential of the third node N3 is also raised. Therefore, the working potential of the driving transistor DT is the potential of the gate of the driving transistor DT, that is, the first node N1 minus the voltage value of the first power signal Vpvdd minus the potential of the third node N3. The value will decrease, and after the reduction This is equivalent to enhancing the negative bias (i.e., reverse bias) of the driving transistor DT when the pixel circuit 10 controls the light-emitting element 20 in the light-emitting stage T4. Therefore, the bias adjustment signal Vbias can be adjusted synchronously in the light-emitting stage T4. If the second power supply signal Vpvee is raised in the light-emitting stage T4, the bias adjustment signal Vbias is reduced synchronously in the light-emitting stage T4 to weaken the negative bias state of the driving transistor DT. That is, by reducing the voltage value of the bias adjustment signal Vbias at this time, the deviation of the light-emitting brightness of the light-emitting element 20 from the originally required brightness due to the change of the second power supply signal Vpvee is avoided, which is beneficial to improving the display quality of the display panel 000.

[0101] In some optional embodiments, please refer to Figure 1 , Figure 6 and Fig.13 , Fig.13 yes Figure 6 Another working timing diagram of the pixel circuit, the driving method provided in this embodiment also includes a second bias adjustment stage T6 and a third bias adjustment stage T7; the second bias adjustment stage T6 is executed between the reset stage T2 and the threshold compensation and data writing stage T3, and the third bias adjustment stage T7 is executed between the threshold compensation and data writing stage T3 and the light-emitting stage T4.

[0102] This embodiment explains that the working process of the pixel circuit 10 at least includes a first bias adjustment stage T1, a reset stage T2, a second bias adjustment stage T6, a threshold compensation and data writing stage T3, a third bias adjustment stage T7, and a light emitting stage T4;

[0103] In the first bias adjustment stage T1, that is, before resetting the gate of the driving transistor DT, the first scanning signal Scan1 can be input with a low-level signal to control the second transistor M2 of the bias adjustment module 103 to be turned on, and the high-potential signal of the third scanning signal Scan3 can control the third transistor M3 of the threshold compensation module 102 to be turned on, and the bias adjustment signal Vbias is transmitted to the driving transistor DT through the second transistor M2 to adjust the bias state of the driving transistor DT, so that the driving transistor DT is reverse biased, the first electrode and the second electrode of the driving transistor DT are reversed, the degree of ion polarization inside the driving transistor DT is weakened, and the threshold voltage of the driving transistor DT is reduced. The threshold voltage of the driving transistor DT is adjusted by biasing the driving transistor DT to compensate for the threshold voltage drift problem caused by the hysteresis effect of the driving transistor due to the forward bias state of the driving transistor DT. Optionally, the bias adjustment signal Vbias can be a DC positive voltage signal. Since the bias adjustment signal Vbias is a relatively high positive voltage value, that is, no matter what the picture displayed in the previous frame is, before resetting the gate of the driving transistor DT and when writing the current picture, the driving transistor DT needs to be written with the bias adjustment signal Vbias once, thereby weakening the bias effect of the previous frame display picture, so that the state of the driving transistor DT when writing the current display picture is closer to the preset state, thereby weakening the bias difference of the driving transistor DT when the current frame and the previous frame display pictures are displayed, improving the threshold drift problem of the driving transistor DT, and enhancing the display effect.

[0104] In the reset stage T2 , the fourth scan signal Scan4 is an effective level signal. If the sixth transistor M6 is an N-type metal oxide transistor, the fourth scan signal Scan4 controls the sixth transistor M6 of the first reset module 106 to turn on under a high potential signal, and the first reset signal Vref1 resets the gate of the driving transistor DT.

[0105] In the second bias adjustment stage T6, that is, before the threshold compensation and data writing stage T3, the fourth scan signal Scan4 can be made to be an effective level signal. If the sixth transistor M6 is an N-type metal oxide transistor, the fourth scan signal Scan4 controls the sixth transistor M6 of the first reset module 106 to be turned on under a high potential signal, and the high potential signal of the third scan signal Scan3 controls the third transistor M3 of the threshold compensation module 102 to be turned on. The first reset signal Vref1 is written into the second node N2 and the third node N3, and the potential difference between the second node N2 (that is, the first electrode of the driving transistor DT) and the third node N3 (the second electrode of the driving transistor DT) can be eliminated as much as possible, avoiding the difference in the bias state of the driving transistor DT caused by the different potentials of the second node N2 and the third node N3 caused by different pictures, so that when the subsequent data voltage signal is written, the states of the gate, the first electrode and the second electrode of the driving transistor DT can be kept as close as possible.

[0106] Further optionally, the present embodiment may also be arranged in the second bias adjustment stage T6 to change the value of the bias adjustment signal Vbias so that the voltage values ​​of the gate of the driving transistor DT, the first electrode of the driving transistor DT, and the second electrode of the driving transistor DT are equal.

[0107] By adding a second bias adjustment stage T6 before the threshold compensation and data writing stage T3, this embodiment can change the value of the bias adjustment signal Vbias input in the second bias adjustment stage T6 so that the potentials of the first node N1, the second node N2, and the third node N3 are set to the same potential. That is, the value of the bias adjustment signal Vbias can be changed in the added second bias adjustment stage T6 so that the voltage values ​​of the gate of the driving transistor DT, the first electrode of the driving transistor DT, and the second electrode of the driving transistor DT are equal, thereby further reducing the bias difference of the driving transistor DT before the threshold compensation, which is conducive to better achieving the bias adjustment effect on the driving transistor DT.

[0108] In the threshold compensation and data writing stage T3, the second scan signal line Scan2 inputs a low potential signal to control the first transistor M1 of the data writing module 101 to turn on, and the high potential signal of the third scan signal Scan3 controls the third transistor M3 of the threshold compensation module 102 to turn on. The data voltage signal after threshold compensation provided by the data line S is transmitted to the gate of the driving transistor DT through the first transistor M1, the driving transistor DT, and the third transistor M3, and the threshold compensation is performed on the driving transistor DT to self-compensate the deviation of the threshold voltage of the driving transistor DT.

[0109] In the third bias adjustment stage T7, that is, after the threshold compensation and data writing stage T3 and before the light emitting stage T4, the pixel circuit 10 performs the third bias adjustment stage T7. In the third bias adjustment stage T7, the first scanning signal Scan1 is controlled to input a low-level signal so that the second transistor M2 of the bias adjustment module 103 is turned on to provide the bias adjustment signal Vbias to the second node N2 to adjust the bias state of the driving transistor DT. In this embodiment, three bias adjustment stages are set in the working cycle of the pixel circuit 10, and the time for adjusting the bias state of the driving transistor DT in the driving cycle is maliciously increased to improve the improvement of the threshold voltage drift of the driving transistor DT due to the hysteresis effect.

[0110] Optionally, the third bias adjustment stage T7 of the present embodiment can be performed after the threshold compensation and data writing stage T3 in the data writing frame of the pixel circuit 10 and before the light-emitting stage T4, or in some other optional embodiments, the working process of the pixel circuit 10 includes a data writing frame and a holding frame, then the operation of the third bias adjustment stage T7 can also be performed before the light-emitting stage of the holding frame. When the display panel 000 adopts the low-frequency driving mode, since there is no data writing stage in the holding frame under the low-frequency driving mode, there is a difference between the state of the first electrode of the driving transistor DT, that is, the second node N2 in the holding frame and the state of the second node N2 in the data writing frame. Therefore, in order to make the states of the second node N2 in the light-emitting stage of the holding frame and the light-emitting stage of the data writing frame as close as possible, a bias adjustment signal Vbias can be applied to the second node N2 in the light-emitting stage of the holding frame, that is, the first scanning signal Scan1 is controlled to input a low-level signal so that the second transistor M2 of the bias adjustment module 103 is turned on, so as to provide the bias adjustment signal Vbias to the second node N2, so as to achieve a bias adjustment of the driving transistor DT to fit the state when the data is written to the frame. In this way, before the light-emitting stage T4 of the data writing frame, the third bias adjustment stage T7 is also performed, and the bias adjustment signal Vbias is applied to the second node N2, so that the states of the second node N2 in the data writing frame and the holding frame can be closer, which is beneficial to improve the light-emitting difference and improve the quality of light-emitting display.

[0111] In the light-emitting stage T4, the first light-emitting control signal EM1 inputs a low-potential signal to control the fourth transistor M4 of the first light-emitting control module 104 to be turned on, and the second light-emitting control signal EM2 inputs a low-potential signal to control the fifth transistor M5 of the second light-emitting control module 105 to be turned on. The driving transistor DT generates a driving current under the control of its gate voltage. The first light-emitting control signal EM1 and the second light-emitting control signal EM2 can be provided by the same light-emitting control signal line. A conductive path is formed among the first power supply signal Vpvdd, the fourth transistor M4, the driving transistor DT, the fifth transistor M5, the light-emitting element 20, and the second power supply signal Vpvee. The driving current is provided to the light-emitting element 20 to realize the driving current flowing through the light-emitting element 20 and control the light-emitting element 20 to emit light.

[0112] It should be noted that, in specific implementation, the connection structure of the pixel circuit 10 of this embodiment includes but is not limited to the above structure and driving sequence, and may also be other connection structures and driving methods, which are not limited in this embodiment.

[0113] In some alternative embodiments, please refer to Fig.14 , Fig.14 1 is a schematic diagram of a planar structure of a display device provided in an embodiment of the present invention. The display device 111 provided in this embodiment includes the display panel 000 provided in the above embodiment of the present invention. Fig.14 The embodiment only takes a mobile phone as an example to illustrate the display device 111. It can be understood that the display device 111 provided in the embodiment of the present invention can be a computer, a television, a car display device or other display device 111 with a display function, and the present invention does not specifically limit this. The display device 111 provided in the embodiment of the present invention has the beneficial effects of the display panel 000 provided in the embodiment of the present invention. For details, please refer to the specific description of the display panel 000 in the above embodiments, and this embodiment will not be repeated here.

[0114] It can be seen from the above embodiments that the display panel and the driving method thereof, and the display device provided by the present invention achieve at least the following beneficial effects:

[0115] The sub-pixel of the display panel provided by the present invention may include an electrically connected pixel circuit and a light-emitting element, and the pixel circuit is used to control the light-emitting element to emit light. The pixel circuit at least includes a driving transistor and a data writing module, a threshold compensation module and a bias adjustment module, the data writing module is used to provide a data signal to the driving transistor, and the threshold compensation module is used to detect and compensate for the deviation of the threshold voltage of the driving transistor, and the deviation of the compensated threshold voltage and the data signal provided by the data line itself are jointly provided to the driving transistor to achieve threshold compensation for the driving transistor, which can improve the display unevenness caused by the threshold voltage difference of the driving transistor caused by the manufacturing process and the threshold voltage drift of the driving transistor caused by transistor aging. The bias adjustment module is used to provide a bias adjustment signal to the driving transistor, adjust the bias state of the driving transistor, improve the threshold drift problem of the driving transistor, and enhance the display effect. The first pole of the driving transistor of the present invention is connected to the first power supply signal, and the second pole of the driving transistor is connected to the second power supply signal. When the pixel circuit drives the light-emitting element electrically connected to it to emit light, the conductive path between the first power supply signal, the driving transistor, the light-emitting element, and the second power supply signal can be used to make the driving transistor generate a driving current that drives the light-emitting element to emit light, thereby achieving the light-emitting effect of the light-emitting element. The present invention sets the first power signal connected to the first electrode of the driving transistor in the pixel circuit to be a fixed value, and the second power signal connected to the second electrode of the driving transistor to be a variable value, and the voltage value of the second power signal can change with the brightness required by the display panel, which is beneficial to saving the power consumption of the entire panel. When the display panel adopts a dynamically changing second power signal to reduce the panel power consumption according to the demand for luminous display brightness, the bias adjustment signal connected to the bias adjustment module also changes dynamically with it, which can avoid the deviation of the luminous brightness of the light-emitting element from the original required brightness due to the change of the second power signal, thereby helping to improve the display quality of the display panel.

[0116] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that the above embodiments may be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A display panel, characterized in that: include: a plurality of sub-pixels, each of which includes a pixel circuit and a light-emitting element that are electrically connected; The pixel circuit at least includes a driving transistor, a data writing module, a threshold compensation module and a bias adjustment module; The first electrode of the driving transistor is electrically connected to the data writing module and the bias adjustment module respectively, and the driving transistor is used to generate a driving current; The first end of the data writing module is electrically connected to the data signal, the second end of the data writing module is electrically connected to the first electrode of the driving transistor, and the data writing module is used to provide the data signal to the driving transistor; The first end of the bias adjustment module is electrically connected to the bias adjustment signal, the second end of the bias adjustment module is electrically connected to the first electrode of the driving transistor, and the bias adjustment module is used to provide the bias adjustment signal to the first electrode of the driving transistor to adjust the bias state of the driving transistor; The threshold compensation module is connected between the gate electrode of the driving transistor and the second electrode of the driving transistor, and the threshold compensation module is used to detect and compensate for the deviation of the threshold voltage of the driving transistor; A first electrode of the driving transistor is connected to a first power signal, and a second electrode of the driving transistor is connected to a second power signal; The second power supply signal is a changing value, and the bias adjustment signal is a changing value.

2. The display panel according to claim 1, characterized in that: The display brightness variation trend of the display panel is inversely proportional to the variation trend of the second power signal, and the variation trend of the bias adjustment signal is inversely proportional to the variation trend of the second power signal.

3. The display panel according to claim 2, characterized in that: When the value of the second power signal increases, the value of the bias adjustment signal decreases.

4. The display panel according to claim 3, characterized in that: The increase in the value of the second power supply signal is ΔA, and the decrease in the value of the bias adjustment signal is ΔB; wherein ΔB≤0.5ΔA.

5. The display panel according to claim 3, characterized in that: The control end of the bias adjustment module is electrically connected to the first scanning signal, and the bias adjustment module is used to provide the bias adjustment signal to the first electrode of the driving transistor under the control of the effective level of the first scanning signal.

6. The display panel according to claim 5, characterized in that: As the value of the second power signal increases, the maintenance time of the effective level of the first scan signal decreases.

7. The display panel according to claim 1, characterized in that: The pixel circuit further includes a first light emitting control module, a second light emitting control module, a first reset module, and a second reset module; A first end of the first light emitting control module is electrically connected to the first power supply signal, and a second end of the first light emitting control module is electrically connected to a first electrode of the driving transistor; A first end of the second light emitting control module is electrically connected to a first electrode of the driving transistor, and a second end of the second light emitting control module is electrically connected to the light emitting element; A first end of the first reset module is electrically connected to a first reset signal, and a second end of the first reset module is electrically connected to a gate of the driving transistor; A first end of the second reset module is electrically connected to a second reset signal, and a second end of the second reset module is electrically connected to the light emitting element.

8. The display panel according to claim 7, characterized in that: The data writing module comprises a first transistor, a gate of the first transistor is electrically connected to the second scanning signal, a source of the first transistor is electrically connected to the data signal, and a drain of the first transistor is electrically connected to the first electrode of the driving transistor; The bias adjustment module includes a second transistor, a gate of the second transistor is electrically connected to the first scanning signal, a source of the second transistor is electrically connected to the bias adjustment signal, and a drain of the second transistor is electrically connected to the first electrode of the driving transistor; The threshold compensation module includes a third transistor, a gate of the third transistor is electrically connected to the third scanning signal, a source of the third transistor is electrically connected to the gate of the driving transistor, and a drain of the third transistor is electrically connected to the second electrode of the driving transistor; The first light emitting control module comprises a fourth transistor, a gate of the fourth transistor is electrically connected to the first light emitting control signal, a source of the fourth transistor is electrically connected to the first power supply signal, and a drain of the fourth transistor is electrically connected to the first electrode of the driving transistor; The second light emitting control module comprises a fifth transistor, a gate of the fifth transistor is electrically connected to the second light emitting control signal, a source of the fifth transistor is electrically connected to the second electrode of the driving transistor, and a drain of the fifth transistor is electrically connected to the anode of the light emitting element; The first reset module includes a sixth transistor, a gate of the sixth transistor is electrically connected to the fourth scan signal, a source of the sixth transistor is electrically connected to the first reset signal, and a drain of the sixth transistor is electrically connected to the gate of the driving transistor; The second reset module includes a seventh transistor, a gate of the seventh transistor is electrically connected to the first scan signal, a source of the seventh transistor is electrically connected to the second reset signal, and a drain of the seventh transistor is electrically connected to the anode of the light emitting element.

9. The display panel according to claim 8, characterized in that: The third transistor and the sixth transistor are N-type metal oxide transistors, and the first transistor, the second transistor, the fourth transistor, the fifth transistor, the seventh transistor, and the driving transistor are all P-type low-temperature polysilicon transistors.

10. The display panel according to claim 8, characterized in that: The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the driving transistor are all P-type low-temperature polysilicon transistors.

11. The display panel according to claim 1, characterized in that: The data writing module is multiplexed into the bias adjustment module, and the data signal is multiplexed into the bias adjustment signal.

12. The display panel according to claim 1, characterized in that: The bias adjustment signal is a DC positive voltage signal.

13. A method for driving a display panel, characterized in that: The driving method is applied to the display panel according to any one of claims 1 to 12; The driving method at least comprises: a first bias adjustment stage, a threshold compensation and data writing stage, and a light emitting stage, wherein the first bias adjustment stage is performed before the threshold compensation and data writing stage; In the first bias regulation stage, the bias regulation module is turned on, and the bias regulation signal is provided to the first electrode of the driving transistor to regulate the bias state of the driving transistor; In the threshold compensation and data writing stage, the threshold compensation module detects and compensates for the deviation of the threshold voltage of the driving transistor, and the data writing module writes the compensated threshold voltage deviation together with the data signal into the driving transistor; In the light emitting stage, the driving transistor generates a driving current to drive the light emitting element to emit light; The driving method further comprises a power supply regulation stage; In the power adjustment stage, the value of the second power signal is adjusted according to the change of the display brightness of the display panel, and the value of the bias adjustment signal is adjusted according to the change of the value of the second power signal.

14. The driving method according to claim 13, characterized in that: The display brightness variation trend of the display panel is inversely proportional to the variation trend of the second power signal, and the variation trend of the bias adjustment signal is inversely proportional to the variation trend of the second power signal.

15. The driving method according to claim 13, characterized in that: In the power supply adjustment stage, the display brightness of the display panel decreases, the value of the second power supply signal increases, and the value of the bias adjustment signal decreases.

16. The driving method according to claim 13, characterized in that: An operating time of the power regulation phase at least partially overlaps an operating time of the first bias regulation phase.

17. The driving method according to claim 13, characterized in that: The working time of the power regulating stage at least partially overlaps with the working time of the light emitting stage.

18. The driving method according to claim 13, characterized in that: The driving method further includes a reset phase performed between the first bias adjustment phase and the threshold compensation and data writing phase.

19. The driving method according to claim 18, characterized in that: The driving method also includes a second bias adjustment phase and a third bias adjustment phase; the second bias adjustment phase is performed between the reset phase and the threshold compensation and data writing phase, and the third bias adjustment phase is performed between the threshold compensation and data writing phase and the light emitting phase.

20. The driving method according to claim 19, characterized in that: In the second bias adjustment stage, the value of the bias adjustment signal is changed so that the voltage values ​​of the gate of the driving transistor, the first electrode of the driving transistor, and the second electrode of the driving transistor are equal.

21. A display device, characterized in that: A display panel comprising any one of claims 1 to 12.

Images