Rapid capturing method for high-dynamic and low-carrier-to-noise-ratio signals

Abstract

The invention particularly relates to a method for quickly capturing high-dynamic and low-carrier-to-noise-ratio signals, which comprises the following steps of: preprocessing input digital intermediate-frequency signals, performing correlation operation on stored local pseudo code data and baseband data after down-conversion, and accumulating correlation results of which the length is a set value; if the local code phase is aligned with the pseudo code phase modulated by the baseband data, a peak value is obtained through FFT, the index of the peak value indicates the Doppler frequency, and the number of FFT calculation times indicates the code phase; calculating a module value based on a real part and an imaginary part output by the FFT; judging whether capturing succeeds or not based on the maximum module value, and obtaining the Doppler frequency of rough capturing if capturing succeeds; and refining the roughly captured Doppler frequency to obtain a refined Doppler frequency. According to the method, the Doppler frequency and the code phase are accurately searched in a short time, and the method is suitable for capturing high-dynamic weak signals.

Description

Technical Field

[0001] The present invention relates to the technical field of signal capture, and in particular to a method for quickly capturing high-dynamic and low-carrier-to-noise ratio signals, for realizing Doppler weak signal capture. Background Art

[0002] The signal capture process is when the receiver initially locks onto the received signal. The performance of the capture module is crucial for message decomposition and is a crucial step in receiver signal processing. The capture module performs two-dimensional searches of code phase and Doppler frequency by calculating the cached IF sampling data. The tracking loop configures the initial values ​​of the carrier NCO and pseudo-code NCO based on the code phase and Doppler frequency values ​​output by the capture module. The tracking module then tracks the subsequently sampled IF signal based on the initial values ​​configured in the loop. If the capture module takes too long to process the cached data, the calculated Doppler frequency will become unsuitable for subsequent IF sampling data, causing the tracking loop to lose lock. Therefore, capture speed is crucial. Furthermore, the capture accuracy must be less than the tracking module's critical value; otherwise, the tracking loop will be unable to lock onto the signal.

[0003] Commonly used acquisition algorithms include the partially matched filter plus Fourier transform (FFT) method to achieve two-dimensional search of code phase and Doppler frequency. This is a code phase serial and Doppler frequency parallel acquisition algorithm. However, due to the influence of scallop loss and fence effect, the search accuracy of Doppler frequency is low. In addition, the serial search of code phase will increase the acquisition time exponentially, making it difficult to capture signals with rapidly changing Doppler frequency.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to ordinary technicians in this field. Summary of the Invention

[0005] The present invention provides a method for quickly capturing high-dynamic and low-C / N signals, which can achieve the capture of high-dynamic weak signals and overcome the defects in the prior art to a certain extent.

[0006] Other features and advantages of the present invention will become apparent from the following detailed description, or may be learned in part by practice of the present invention.

[0007] According to a first aspect of the present invention, a method for quickly capturing high dynamic and low carrier-to-noise ratio signals is provided, the method comprising: Preprocessing the input digital intermediate frequency signal, wherein the preprocessing includes DC removal, down-conversion, and low-pass filtering; The filtered baseband data is downsampled through data sampling, and the sampled baseband data is spliced ​​and cached. At the same time, a pseudo-random code generator generates a local pseudo-code, sets the same downsampling rate as the baseband data, samples and caches it. Perform correlation operation on the stored local pseudo code data and the down-converted baseband data, and accumulate the correlation results with a set length; If the local code phase is aligned with the pseudo-code phase modulated by the baseband data, a peak is obtained through FFT. The index of the peak indicates the Doppler frequency, and the number of FFT calculations indicates the code phase. The code phase search value, the Doppler frequency search value, and the real and imaginary parts of the FFT output are output. The modulus value is calculated based on the real and imaginary parts of the FFT output. Changing the address of the baseband data read buffer to search for different code phase points, performing coherent integration again and calculating the modulus value; The maximum modulus value is selected from multiple modulus values, and the maximum modulus value is compared with the set capture threshold. If the maximum modulus value is greater than the capture threshold, the capture is successful, and the Doppler frequency corresponding to the maximum modulus value is used as the coarse capture Doppler frequency; The coarsely captured Doppler frequency is refined to obtain a refined Doppler frequency.

[0008] In some exemplary embodiments, the method further includes: setting four control algorithm states of the capture state machine: capture wait, data storage, coarse capture, and fine capture; switching the algorithm state by changing the enable signal; setting a time counter under the main clock timing, switching the algorithm state according to different values ​​accumulated by the time counter, and realizing the state switching by changing the enable signal.

[0009] In some exemplary embodiments, the down-conversion is specifically: performing orthogonal down-conversion on a swept-frequency local oscillator signal to generate I-channel and Q-channel baseband signals.

[0010] In some exemplary embodiments, in the step of performing a correlation operation on the stored pseudo-code data and the down-converted baseband data, two groups of buffer areas are set to perform the correlation operation using a ping-pong algorithm to reduce the coherent integration time.

[0011] In some exemplary embodiments, in the step of changing the address of the baseband data read buffer area to search for different code phase points and performing the coherent integration operation again, the code phase search speed is improved by setting multiple groups of correlators to search multiple code phase points in parallel.

[0012] In some exemplary embodiments, the capture threshold is an adaptive threshold setting, specifically: The maximum modulus values ​​of several code phases preceding or following the maximum modulus value to be determined are summed and averaged to obtain the modulus value of the noise, and the modulus value of the noise is set as the adaptive threshold.

[0013] In some exemplary embodiments, refining the coarsely captured Doppler frequency includes: First, the intermediate frequency signal of the modulated pseudo-code is stripped off according to the searched code phase value, and then the local oscillator signal frequency is adjusted to the nominal intermediate frequency signal + coarse capture Doppler frequency. Finally, the sampling rate is reduced twice and coherent integration is performed. Based on Fourier transform and peak detection, the refined Doppler frequency is output.

[0014] In some exemplary embodiments, the method further comprises: If the capture is unsuccessful, change the frequency control word of the local oscillator module carrier NCO to change the local oscillator signal frequency, set the step value to 500Hz, and expand the Doppler frequency search range by 500Hz accordingly, and try capturing again.

[0015] According to a second aspect of the present invention, a storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the method for quickly capturing high dynamic and low carrier-to-noise ratio signals described in the first aspect is implemented.

[0016] According to a third aspect of the present invention, a computer program product is provided, on which a computer program is stored. When the computer program is executed by a processor, the method for quickly capturing high dynamic and low carrier-to-noise ratio signals described in the first aspect is implemented.

[0017] According to a fourth aspect of the present invention, there is provided an electronic device, comprising: processor; and a memory for storing executable instructions of the processor; The processor is configured to implement the method for rapidly capturing high dynamic and low carrier-to-noise ratio signals as described in the first aspect above by executing the executable instructions.

[0018] The embodiments of the present invention provide a method for rapid capture of high-dynamic and low-C / N ratio signals. It utilizes coherent integration to improve the signal-to-noise ratio and the capture probability of weak signals, and detects whether different signal captures are successful by setting an adaptive capture threshold, thereby improving applicability. Furthermore, the algorithm's search speed is improved by methods such as baseband data sampling, data splicing, parallel pipeline search code phase, and ping-pong algorithm. In response to the problems of narrow FFT capture range and low resolution, the Doppler frequency search range is increased through feedback design, and a method for refining the Doppler frequency is designed to secondary improve the Doppler frequency search accuracy. The present invention first verifies the effect through simulation, and implements it in hardware by designing a VHDL algorithm.

[0019] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings are incorporated into and constitute a part of this specification, illustrate embodiments consistent with the present invention, and together with the description, serve to explain the principles of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and it is clear that those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0021] Figure 1 It is a schematic diagram of the coarse capture system framework; Figure 2 This is the data ping-pong cache read timing diagram; Figure 3 This is the timing diagram of 40 correlators parallel pipeline operation; Figure 4 This is the FFT operation timing diagram; Figure 5 This is a schematic diagram of the fine capture system framework; Figure 6 This is the flow chart of the entire capture method. DETAILED DESCRIPTION

[0022] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0023] In addition, the accompanying drawings are merely schematic illustrations of the present invention and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus repetitive descriptions thereof will be omitted. Some of the blocks shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0024] In response to the shortcomings and deficiencies of the prior art, this example embodiment provides a method for rapidly capturing high-dynamic and low-carrier-to-noise ratio signals. By designing a sweeping local oscillator module to change the local oscillator signal of the mixing module, the Doppler frequency search range can be expanded and the FFT spectrum can be refined to improve the Doppler frequency search accuracy. Furthermore, the data rate is reduced by methods such as data downsampling and data splicing. At the same time, multiple groups of correlators are designed to perform parallel pipeline operations, ping-pong operations, and other methods to search for code phases in parallel, shortening the capture time exponentially. By adaptively setting the capture threshold, different signals can be captured, improving the applicability of the algorithm. The present invention completes precise searches for Doppler frequency and code phase in a short period of time and is suitable for capturing high-dynamic weak signals.

[0025] refer to Figure 5 As shown, the modules involved in the method for fast capturing high dynamic and low carrier-to-noise ratio signals include a frequency sweeping local oscillator module, an orthogonal mixing down-conversion module, a low-pass filtering module, a data sampling module, a data buffer module, a code generator module, a coherent integration module, an FFT module, a peak detection module, a feedback adjustment module, and a Doppler frequency precision search module; specifically, the following steps may be included: 1) Signal preprocessing: First, the DC voltage of the input IF signal is removed. The accumulated value of the carrier NCO is used to generate the I (Cos) and Q (Sin) local oscillator signals through a lookup table. The frequency of the local oscillator signals is controlled by the frequency control word input to the NCO. The local oscillator signals and the received digital IF signal undergo quadrature mixing to achieve down-conversion. The mixed signal contains fLO+fIF and fLO-fIF components, where fLO is the local oscillator frequency and fIF is the IF signal frequency. The signal is filtered through an FIR low-pass filter to remove high-frequency signals. The low-pass filter coefficients are determined by setting the cutoff frequency, window function, filter order, and sampling rate.

[0026] 2) The down-converted signal is up-modulated with the telegram and pseudo-code. The capture algorithm only utilizes 1ms sampled intermediate frequency data to minimize the impact of inter-message bits on the capture result. To increase capture speed, the filtered baseband data is downsampled through data sampling to reduce the data rate. The sampling rate must meet the sampling theorem (greater than twice the pseudo-code frequency) and the asynchronous sampling theorem for pseudo-codes (the sampling rate cannot be an integer multiple of the pseudo-code frequency). The sampled baseband data is then concatenated and cached to increase the data calculation rate. Simultaneously, a pseudo-random code generator generates a local pseudo-code, sets the same downsampling rate as the baseband data, samples it, and caches it.

[0027] 3) Set up the capture state machine to control the algorithm state. There are four states: capture wait, data storage, coarse capture, and fine capture. The algorithm state is switched by changing the enable signal.

[0028] 4) The coherent integration module performs correlation operation on the stored pseudo-random code data and the baseband data after frequency down-conversion, and accumulates the correlation results with a length of X, thereby improving the signal-to-noise ratio and the spectral resolution of FFT. Two sets of buffer zones are set to perform correlation operation in a ping-pong algorithm, thereby reducing the coherent integration time.

[0029] 5) The address of the baseband data reading buffer zone is changed to search different code phase points, and the coherent integration operation is performed again. Multiple sets of correlators are set to improve the code phase search speed.

[0030] 6) FFT is used to search the Doppler frequency. If the code phase is preliminarily aligned, a peak value is obtained through FFT, the index of the peak value indicates the Doppler frequency, and the number of FFT calculations indicates the code phase. Whether the acquisition is successful is determined through a peak detection module. The peak detection module sets the acquisition threshold adaptively, so that the algorithm can detect whether different signal acquisitions are successful, thereby improving the applicability.

[0031] 7) The detection result of step 6) is used. If the acquisition is not successful, the frequency control word of the local oscillator module carrier NCO is changed to change the frequency of the local oscillator signal, and the step value is set to 500 Hz, so that the search range of the Doppler frequency is correspondingly expanded by 500 Hz. The acquisition is performed again through steps 1) to 6).

[0032] 8) When the coarse acquisition is completed, the fine acquisition module is started. First, the searched code phase value is used to strip the modulated pseudo-random code in the intermediate frequency signal. Then, the frequency of the frequency-sweeping local oscillator signal is set to the nominal intermediate frequency frequency + the Doppler frequency of the coarse acquisition. At the same time, the sampling rate is reduced twice to refine the FFT spectrum through the twice-reduced sampling rate, thereby improving the search accuracy of the Doppler frequency.

[0033] Next, each step in the example embodiment will be described in more detail with reference to the accompanying drawings and examples.

[0034] The acquisition algorithm parameters include that the system working clock f clock is set to 110 MHz, the signal reduction sampling rate freduce sample is set to 20.48 MHz, the pseudo-random code rate fpseudo random is set to 10.23 MHz, the pseudo-random code length code length is set to 10230, the reduction sampling data time 1 ms corresponds to the data length sample length of 20480, the partial coherent integration length X is set to 640, the FFT point number N is set to 128, and the number of parallel correlators number correlator is set to 40. The feedback search Doppler frequency step value is 500 Hz. The fine search range is set to 8.

[0035] The present application includes the following 1-10 steps.

[0036] Step 1. Signal preprocessing. Preprocessing mainly involves removing DC from the input digital IF signal, down-converting, downsampling and low-pass filtering, IF data splicing and caching, and generating and caching local pseudo-code.

[0037] 1) Take 200 samples of the digital intermediate frequency signal, accumulate and average them, and subtract the average value from the 1ms sampling data used in the capture phase to complete the DC removal s(i)-s_mean.

[0038] 2) Orthogonal down-conversion is performed on the swept local oscillator signal, generating I and Q baseband signals with adjustable local oscillator frequency. High-frequency noise in the baseband signal is then filtered through an 8-tap FIR low-pass filter. The FIR filter's cutoff frequency must be greater than the Doppler frequency. Four consecutive I and Q baseband signals are concatenated using the data concatenation operator "&," shifting the subsequent matched filter module from serial to parallel operation, increasing the algorithm's computational speed by a factor of four. The 1ms sampled data is then evenly divided into 0.5ms segments, buffered in two RAM registers, and the coherent integral values ​​are calculated in parallel.

[0039] 3) Set the code frequency and initial code phase of the pseudo code generator according to different signals to generate local pseudo code, then resample the local pseudo code at the sampling rate freduce_sample, and use two RAM registers to store the code sampling values ​​respectively.

[0040] Step 2. Design the capture state machine. Set up four algorithm states: wait, data storage, coarse capture, and fine capture. Set a time counter under the master clock timing. 0-10ms is the data storage time, 10ms-30ms is the coarse capture time, and 30ms-50ms is the fine capture time. Switch the algorithm state based on the accumulated value of the time counter. This state switching is achieved by changing the enable signal.

[0041] Step 3. Use partially matched filtering to output the coherent integration value. The partially matched filter uses a non-coherent structure. The I and Q paths multiply and accumulate the corresponding X pseudo-codes input. Each coherent integration module completes the coherent integration accumulation value of length X. The total data length is 20480. The number of master clock pulses required for a complete coherent integration is 20480 / data splicing length / number of ping-pong algorithm blocks = 20480 / 4 / 2 = 2560. The number of blocks for the FFT operation, FFT_D, is 20480 / 640 = 32.

[0042] Step 4. Ping-Pong Cache. To avoid data read / write conflicts, two RAM registers are designed to store the coherent integration values. When RAM1 is writing data, RAM2 is reading data. The two registers alternately write the coherent integration values ​​of the 40 correlators. The switching period of the ping-pong cache is T_switch = freduce_sample ×1ms / f clock / 4. In the next cycle, RAM2 writes data and RAM1 reads data. The read and write operations of the registers are controlled by the enable signal. The number of times the RAM registers need to be switched for a complete code phase search is count_switch_RAM= f reduce_sample ×1ms / 40.

[0043] Step 5. Searching for Different Code Phases: Different code phases are searched by changing the RAM register address used to store the baseband signal. The local pseudo-code read address remains unchanged for each code phase search. The number of pseudo-code phase points searched within one code period is 20480, with a code phase search resolution of code_length / 20480 = 0.4995 chips. To increase code phase search speed, 40 correlators are configured to operate simultaneously, searching multiple code phase points in parallel. A three-level code phase search method is used.

[0044] In the first stage, the baseband data of the coherent integration is spliced ​​by 4 baseband data. Therefore, the base address of the baseband data RAM register read by the master clock pulse is increased by 1. The baseband signal is right-shifted by 4 code phases compared with the local pseudo code. The 40 sets of parallel correlators search for the code phase value of 4×( i -1). i ranges from 1 to 40.

[0045] The second stage is to re-join the baseband data. The m baseband data after the current moment and the 4-m baseband data before the previous moment are re-joined (m is 1, 2, 3). The baseband data is shifted right by m bits. The 40 sets of parallel correlators search for the code phase value of 4×( i -1)+m. i The value range is 1 to 40.

[0046] In the third stage, the first two stages search the first 160 code phases. The base address of the baseband signal RAM register read data is incremented by 160, and the next 160 code phases are searched. This process changes 128 times, completing the search for all 20,480 code phases. The total acquisition time is 2560 × (20,480 / 40) / 110M, approximately 11.916ms.

[0047] Step 6. The FFT module uses a pipeline structure, allowing for continuous calculations. The number of FFT blocks, FFT_D, is 32, and the number of FFT points, N, is 128. Therefore, 96 zeros must be appended to the input data before the FFT is performed. Channel I data serves as the real input for the FFT, and channel Q data serves as the imaginary input for the FFT. The real and imaginary data output by the FFT are used to calculate the modulus. Two FFT modules are designed to read and process data from the RAM registers. These two FFT modules alternately search for different code phases. Each FFT module searches for one code phase every 64 master clock pulses. A total of 40 code phases can be searched within 2560 master clock pulses.

[0048] The code phase search value CN is: C N =Rem[4×( i -2) / 160]+Round[4×( i -2) / 160]+160×( j -1). Where: Rem is the remainder operation; Round is the integer operation; CN is the code phase value to be searched; i The number of pulses is 64. j The number of pulses is 2560; FFT1 and FFT2 alternately output code phase search values.

[0049] If the local code phase aligns with the pseudo-code phase of the baseband data modulation, a correlation peak will be detected after the FFT. This peak is captured by the peak detection circuit, and the FFT simultaneously outputs an index, which indicates the FFT frequency. The frequency corresponding to the correlation peak in the FFT is the Doppler frequency, and the number of FFT runs indicates the code phase position. Therefore, a key step in the FFT is to associate the code phase search value, the Doppler frequency search value, and the real and imaginary parts of the FFT output, and transmit them to the modulus calculation module.

[0050] Doppler search range of the FFT f width = f reduce_sample / X / 2=16KHz.

[0051] Doppler search resolution of FFT f rough_doppler = f reduce_sample / X / N=250Hz.

[0052] Doppler search value from FFT f doppler = f rough_doppler ×index.

[0053] Step 7. Modulus calculation and peak detection. The modulus is obtained by taking the real and imaginary parts of the FFT output. The first modulus value outputted by the FFT is taken as the maximum value. When the next modulus value arrives, it is compared with the current value to update the maximum modulus value and the corresponding index. After each code phase search is completed, the Doppler frequency at which the modulus value is maximum at that code phase is obtained.

[0054] The peak detection module first receives the calculated modulus data (maximum modulus values ​​at different code phases and their corresponding indices). It compares the maximum values ​​of the 20,480 code phases, following the same principle as frequency search: the first value is taken as the maximum, subsequent values ​​are compared with the maximum, and the maximum value and its corresponding index (code phase value and Doppler frequency) are updated.

[0055] Step 8. Set the capture threshold. After obtaining the maximum value and the corresponding index, the modulus value needs to be determined. First, set the capture threshold. If the maximum modulus value exceeds the capture threshold, the capture is successful. The capture threshold depends on the gain and signal quality of each module. To simplify calculations, the capture threshold is set adaptively. Successful capture is determined by comparing the maximum modulus value with the noise modulus value. Specifically, store the 20,480 maximum code phase modulus values ​​obtained by the peak detection module in a RAM register and calculate the noise modulus value. Also, record the RAM register address at the time of the maximum code phase modulus value.

[0056] Assumptions The maximum modulus value among all 20480 code phases found (the mth code phase in this case) is obtained, and the code phases from m+51th to m+550th are taken. Or the code phase from m-550 to m-51 The maximum modulus of 500 consecutive code phases is summed and averaged to obtain the modulus of the captured noise. , the capture is complete. If the capture is not successful, reset the capture algorithm state machine and capture again, setting a total of 6 captures.

[0057] Step 9. If all six attempts at this LO frequency are unsuccessful, expand the Doppler frequency search range. Change the frequency control word of the LO module's carrier NCO to change the LO signal frequency. Set the step value to 500 Hz, which will increase the Doppler frequency search range by 500 Hz. Repeat steps 1 through 9 to attempt acquisition.

[0058] Step 10. Doppler frequency precision search. The spectrum refinement method is used to further improve the Doppler frequency search accuracy. First, the intermediate frequency signal of the modulated pseudocode is stripped according to the searched code phase value, and then the local oscillator signal frequency is adjusted to the nominal intermediate frequency signal + coarse capture Doppler frequency. Finally, the sampling rate is reduced twice, and the sampling rate is reduced by 8 times. The Doppler frequency search resolution is f accuracy_doppler =f reduce_sample / 8 / X / N=31.25Hz, increased from the original 250Hz to 31.25Hz.

[0059] As can be seen from the above implementation steps, the implementation process of the high-dynamic fast acquisition algorithm proposed in this invention primarily includes five modules: data preprocessing and caching, coherent integration, parallel code phase search, FFT coarse acquisition, and FFT spectrum refinement. The present invention uses a designed swept-frequency local oscillator module to adjust the local oscillator frequency, thereby expanding the Doppler frequency and refining the FFT spectrum for precise search. The present invention improves the algorithm's applicability by adaptively setting the acquisition threshold, and the algorithm is designed to implement parallel code phase search, thereby increasing acquisition speed.

[0060] It should be noted that, as another aspect, the present application also provides a storage medium, which can be included in an electronic device; or it can exist independently without being installed in the electronic device. The above storage medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the method described in the following embodiments. For example, the electronic device can implement the following Figure 2 The individual steps of the method are shown.

[0061] In one embodiment, the present application provides a computer program product, including a computer program, which implements the steps in the above-mentioned method embodiments when executed by a processor.

[0062] Furthermore, the above-described figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention and are not intended to be limiting. It is readily understood that the processes illustrated in the above-described figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0063] Other embodiments of the present invention will readily occur to those skilled in the art after considering the specification and practicing the invention herein. This application is intended to cover any variations, uses, or adaptations of the present invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the invention being indicated by the claims.

[0064] It should be understood that the present invention is not limited to the exact construction described above and shown in the drawings and that various modifications and variations can be made without departing from the scope thereof, which is limited only by the appended claims.

Claims

1. A method for rapidly capturing high dynamic and low carrier-to-noise ratio signals, characterized in that: The method comprises: Preprocessing the input digital intermediate frequency signal, wherein the preprocessing includes DC removal, down-conversion, and low-pass filtering; The filtered baseband data is downsampled through data sampling, and the sampled baseband data is spliced ​​and cached. At the same time, a pseudo-random code generator generates a local pseudo-code, sets the same downsampling rate as the baseband data, samples and caches it. Perform correlation operation on the stored local pseudo code data and the down-converted baseband data, and accumulate the correlation results with a set length; If the local code phase is aligned with the pseudo-code phase modulated by the baseband data, a peak is obtained through FFT. The index of the peak indicates the Doppler frequency, and the number of FFT calculations indicates the code phase. The code phase search value, the Doppler frequency search value, and the real and imaginary parts of the FFT output are output. The modulus value is calculated based on the real and imaginary parts of the FFT output. Changing the address of the baseband data read buffer to search for different code phase points, performing coherent integration again and calculating the modulus value; The maximum modulus value is selected from multiple modulus values, and the maximum modulus value is compared with the set capture threshold. If the maximum modulus value is greater than the capture threshold, the capture is successful, and the Doppler frequency corresponding to the maximum modulus value is used as the coarse capture Doppler frequency; The coarsely captured Doppler frequency is refined to obtain a refined Doppler frequency.

2. The method according to claim 1, characterized in that The method further includes: setting four control algorithm states of the capture state machine: capture waiting, data storage, coarse capture and fine capture; switching the algorithm state by changing the enable signal; setting a time counter under the main clock timing, switching the algorithm state according to different values ​​accumulated by the time counter, and realizing the state switching by changing the enable signal.

3. The method according to claim 1, characterized in that The down-conversion is specifically: performing orthogonal down-conversion on a frequency-sweeping local oscillator signal to generate I-channel and Q-channel baseband signals.

4. The method according to claim 1, wherein In the step of performing correlation operation on the stored pseudo-code data and the baseband data after down-conversion, two groups of buffer areas are set to perform correlation operation using a ping-pong algorithm to reduce the coherent integration time.

5. The method according to claim 1, wherein In the step of changing the address of the baseband data read buffer area to search for different code phase points and performing the coherent integration operation again, the code phase search speed is improved by setting multiple groups of correlators to search multiple code phase points in parallel.

6. The method according to claim 1, characterized in that The capture threshold is an adaptive threshold setting, specifically: The maximum modulus values ​​of several code phases preceding or following the maximum modulus value to be determined are summed and averaged to obtain the modulus value of the noise, and the modulus value of the noise is set as the adaptive threshold.

7. The method according to claim 1, characterized in that The refining of the coarsely captured Doppler frequency includes: First, the intermediate frequency signal of the modulated pseudo-code is stripped off according to the searched code phase value, and then the local oscillator signal frequency is adjusted to the nominal intermediate frequency signal + coarse capture Doppler frequency. Finally, the sampling rate is reduced twice and coherent integration is performed. Based on Fourier transform and peak detection, the refined Doppler frequency is output.

8. The method according to claim 1, characterized in that The method further comprises: If the capture is unsuccessful, change the frequency control word of the local oscillator module carrier NCO to change the local oscillator signal frequency, set the step value to 500Hz, and expand the Doppler frequency search range by 500Hz accordingly, and try capturing again.

9. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for quickly capturing high dynamic and low carrier-to-noise ratio signals according to any one of claims 1 to 8 is implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for quickly capturing high dynamic and low carrier-to-noise ratio signals according to any one of claims 1 to 8 is implemented.

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