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Level drift circuit and active matrix driver

A circuit and level technology, applied in the field of active matrix drivers, can solve the problems of high power consumption and high current, and achieve the effects of low current consumption, reduced turn-on time, and reduced deformation

Inactive Publication Date: 2006-06-21
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This requires relatively large currents, resulting in relatively large power dissipation

Method used

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  • Level drift circuit and active matrix driver
  • Level drift circuit and active matrix driver
  • Level drift circuit and active matrix driver

Examples

Experimental program
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Embodiment Construction

[0052] Without loss of generality and by way of example only, the embodiments described below relate to a level shifting circuit for boosting the logic high level of an input signal when the common ground logic level of the signal is substantially unchanged. For example, the input signal can be at 0 volts (V SS ) and 3 volts (V HH ) digital logic signal switching between, the output signal can be between 0 volts and 15 volts (V DD ) digital logic signal that switches between.

[0053] Figure 8 The shown level shifting circuit comprises a first level shifting stage 30 and a second level shifting stage 31 . The first stage 30 has an enable input EN1 connected to the enable input EN of the level shifting circuit. The enable input EN is grounded as shown so that the first stage 30 can be started without interruption, but this is not required. The first stage 30 has a first input connected to the signal input IN of the level shifting stage. The input terminal IN receives a r...

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Abstract

A level shift circuit includes a low-power, low-speed first level shifter 30 and a high-power, high-speed second level shifter stage 31 . Both stages 30 and 31 have signal inputs connected to a common input IN for receiving signals, at least one of the levels of the two stages will be shifted. The output terminal of the first stage 30 is connected to the enabling input terminal EN2 of the second stage 31, and the operation of the second stage 31 is switched between the enabling state and the disabling state, wherein when the second stage 31 is in the disabling state, the second Stage 31 consumes little or no power. The first stage 30 has an enable input EN1 which is continuously activated.

Description

technical field [0001] The invention relates to a level shifting circuit and an active matrix driver comprising the same. Background technique [0002] For example, level shifting circuits are required in digital metal-oxide-semiconductor (MOS) circuits that need to respond to input signals whose magnitudes are substantially lower than the supply voltage. This circuit is intended for use with low voltage signals, such as silicon-on-insulator (SOI) circuits that typically have an amplitude range of 1 to 5 volts, but operate substantially above the supply voltage, such as 10 to 20 volts . A specific example of such a device is a monolithic driver circuit for flat panel active matrix displays fabricated from polysilicon thin film transistors (TFTs). Another application of level-shifting circuits is to interface between different logic families, such as between TTL and CMOS. [0003] attached figure 1 A known level shift circuit is shown, which comprises n-channel transistor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/00H03K19/0175H03K19/0185H03K19/04G02F1/133G05F3/26G09G3/20G09G3/36H01L21/822H01L27/04H01L29/786
CPCG09G3/20G09G2300/08G09G2310/0275G09G2310/0289H03K19/0016H03K19/0175
Inventor G·A·卡尔恩斯C·J·布朗
Owner SHARP KK