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Method and apparatus for interfacing a processor to a coprocessor

A technology of coprocessors and processors, which is used in electrical digital data processing, instruments, memory systems, etc.

Inactive Publication Date: 2006-12-13
APPLE INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this last transfer involves overhead that may not be acceptable for some coprocessor operations

Method used

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  • Method and apparatus for interfacing a processor to a coprocessor
  • Method and apparatus for interfacing a processor to a coprocessor
  • Method and apparatus for interfacing a processor to a coprocessor

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Embodiment Construction

[0019] In the following description, numerous specific details are set forth, such as specific words or byte lengths, etc., in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without such details. In other instances, circuits have been shown in block diagram form in order not to obscure the invention in unnecessary detail. For the most part, details involving timing considerations, etc. have been omitted, since such details are not necessary to gain a complete understanding of the invention and are within the understanding of one of ordinary skill in the relevant art.

[0020] The term "bus" is used to denote a plurality of signals or conductors that can be used to convey one or more of various information such as data, address, control or status. The terms "assert" and "negate" are used respectively when used to present a signal, status bit, or similar dev...

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PUM

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Abstract

The present invention relates generally to interfacing a processor (12) with at least one coprocessor (14, 16). One embodiment relates to a processor having a set of broadcast specifiers which it uses to selectively broadcast an operand that is being written to a register within the processor to a coprocessor communication bus. Each broadcast specifier may therefore include a broadcast indicator corresponding to each general purpose register of the processor. An alternate embodiment may also use the concept of broadcast regions (164, 166, 168, 170) where each broadcast region may have a corresponding broadcast specifier where one broadcast specifier may correspond to multiple broadcast regions. Alternatively, in one embodiment, the processor may use broadcast regions independent of the broadcast specifiers where the coprocessor is able to alter its functionality in response to the current broadcast region. In one embodiment, the processor may provide a region specifier (H REGION) via the coprocessor communication bus (30) to indicate the current broadcast region.

Description

technical field [0001] The present invention relates generally to data processing systems having a processor and at least one coprocessor, and, more particularly, to methods and apparatus for interfacing the processor with the coprocessor. Background technique [0002] The ability to extend the base architecture and the processor with dedicated and special hardware features is an important aspect of a scalable and extensible architecture. [0003] One of the best methods for extending the base architecture and processor capabilities is through the use of coprocessors. These are dedicated, usually single-purpose processors that operate under the control of the processor. A common use of coprocessors is as a math coprocessor to selectively provide floating-point capability to architectures that do not directly support floating-point capability. Some examples of such math coprocessors are the Intel 8087 and 80287. Some other possible uses or types of coprocessors include: mu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38G06F9/34
CPCG06F9/3877G06F9/38
Inventor 威廉·C·矛伊尔
Owner APPLE INC